MCIMX27 Motorola Semiconductor Products, MCIMX27 Datasheet - Page 22

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MCIMX27

Manufacturer Part Number
MCIMX27
Description
Manufacturer
Motorola Semiconductor Products
Datasheet

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Functional Description and Application Information
2.3.31
The Security Controller Module (SCC) is a hardware security component composed of two subblocks, the
Secure RAM and the Security Monitor. Overall, its primary functionality is associated with establishing a
centralized security state controller and hardware security state with a hardware configured, unalterable
security policy. It also provides an uninterruptedly hardware mechanism to detect and respond to threat
detection signals (specifically, platform test access signals). It also serves as a device unique data
protection/encryption resource to enable off-chip storage of security sensitive data and an internal storage
resource, which automatically and irrevocably destroys plain text security sensitive data upon threat
detection.
Security and security services, in an embedded or data processing platform, refer to the i.MX27
processor’s ability to provide mandatory and optional information protection services. Information in this
context refers to all embedded data, both program store and data load. Therefore, a secure platform is
intended to protect information/data from unauthorized access in the form of inspection (read),
modification (write), or execution (use). Security assurance refers to the degree of confidence that security
claims are actually met and is therefore associated with the resources available to, and the integrity of, a
given security design.
2.3.32
The Secure Digital Host Controller (SDHC) controls the MultiMedia Card (MMC), Secure Digital (SD)
memory, and I/O cards by sending commands to cards and performing data accesses to/from the cards. The
Multimedia Card/Secure Digital Host (MMC/SD) module integrates both MMC support along with SD
memory and I/O functions. The SDHC is fully compatible with the MMC System Specification Version
3.0, as well as with the SD Memory Card Specification 1.0, and SD I/O Specification 1.0 with 1/4
channel(s). The maximum data rate in 4-bit mode is 100 Mbps. The SDHC uses a built-in programmable
frequency counter for the SDHC bus, and provides a maskable hardware interrupt for an SDIO interrupt,
internal status, and FIFO status. It has a pair of 32 × 16-bit data FIFO buffers built in.
The MultiMedia Card (MMC) is a universal, low-cost data storage and communication media that is
designed to cover a wide area of applications, including, for example, electronic toys, organizers, PDAs,
and smart phones. The MMC communication is based on an advanced 7-pin serial bus designed to operate
in a low-voltage range.
22
— 5-16 byte key
— Host accessible S-box
MD5, SHA-1, SHA-224, and SHA-256 hashing algorithms
— Messages lengths which are multiples of bytes
— Autopadding supported
— HMAC (support for IPAD and OPAD via descriptors)
— Up to 2
Random number generator (based NIST approved PRNG - FIPS 186-2)
— Entropy is generated via an independent free running ring oscillators
Security Controller Module (SCC)
Secure Digital Host Controller (SDHC)
32
byte message length
i.MX27 Data Sheet, Advance Information, Rev. 0.1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor

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