HFC-S+ Cologne Chip AG, HFC-S+ Datasheet - Page 8

• Manufacturer Part Number: HFC-S+
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

863 C
1.2
The HFC-S+ has 4 different bus modes, which can be selected by the lines ALE and IIOSEL0-IIOSEL3.
Depending on the selected mode the function of several pins is different (see: Pin description).
Table 1: Mode selection
1.2.1 ISA-PC mode
Mode 1:
In mode 1 the HFC-S+ is addressed by two successive port addresses on the ISA-PC bus. The port
address is selected by the lines SA0 - SA9.
The address with SA0='1' is for register selection and the address with SA0='0' is used for data read/write
(see also: 3.1).
1.2.2 Processor interface modes
The processor modes are selected by IIOSEL3-0 = '0000'.
In all processor modes line SA6 must be connected to GND.
Mode 2:
Mode 3:
Mode 4:
The lines SA0-SA7 (except SA6) are used for direct addressing the internal registers of the HFC-S+ (see
also 3.3).
( _V '
GND
VDD
GND
ALE
pulse
Mode description
ALE = GND, IIOSEL3-0
Motorola bus with control signals /CS, R/W, /DS is selected by setting ALE to VDD.
Siemens/Intel bus with seperated address bus and databus and control signals /CS, /WR,
/RD is selected by setting ALE to GND.
Intel bus with multiplexed address and databus with control signals /CS, /WR, /RD,
ALE.
ALE latches the address. The address lines SA0-SA7 must be connected to the data lines
BD0-BD7 (except SA6 which must be connected to GND).
IIOSEL0..3
all 0
all 0
all 0
0
ISA-PC mode (mode 1)
processor mode (mode 2)
processor mode (mode 3)
processor mode (mode 4)
Selected mode
0000
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Cologne
Chip