HFC-S+ Cologne Chip AG, HFC-S+ Datasheet - Page 17

• Manufacturer Part Number: HFC-S+
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

863 C
Then the additional 2 bits of the new I/O address have to be written into the higher address (SA0 = 1) of
the hardware selected I/O address. The other 6 bits in the byte must have a special pattern to switch over
to the software selected address mode. This pattern must be 0101 01aa, whereby aa are the 2 higher
address bits.
e.g.: wanted I/O address: 3A4h / 3A5h
IIOSEL(3:0):
then hardware selected I/O address is: 2E0h = 10 1110 0000 b
write the value A4h or A5h into 2E0h
write the value 57h into 2E1h
x = don't care
All further accesses to the HFC-S+ can only be done on the addresses 3A4h / 3A5h. Only a hardware
reset will switch back the HFC-S+ into hardware selected address mode.
:Q^eQbi " !
*
It's useful to solve a possible address conflict by programming the I/O address as early as possible.
It is recommendable to set the address with a simple .SYS driver in a DOS environment.
hint:
0001
=
=
 D 4
 
  4
 4
4
pattern
address
Cologne
Chip
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