HFC-S Cologne Chip AG, HFC-S Datasheet - Page 2

• Manufacturer Part Number: HFC-S
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

Contents
1 General description ..........................................................................................................................................4
1.1 Applications .................................................................................................................................................... 4
1.2 Mode description ............................................................................................................................................. 5
2 Pin description ..................................................................................................................................................6
2.1 ISA-PC bus and microprocessor interface .......................................................................................................6
2.2 S/T interface transmit signals .......................................................................................................................... 8
2.3 S/T interface receive signals ............................................................................................................................ 8
2.4 SRAM Interface .............................................................................................................................................. 8
2.5 Oscillator ......................................................................................................................................................... 9
2.6 PCM30 bus interface .......................................................................................................................................9
2.7 PCM30 Timeslot enable signals ...................................................................................................................... 9
2.8 Interrupt outputs ............................................................................................................................................ 10
2.9 Miscellaneous pins ........................................................................................................................................10
2.10 Power supply ............................................................................................................................................... 10
2.11 RESET characteristics .................................................................................................................................11
3 Functional description....................................................................................................................................12
3.1 ISA-PC mode ................................................................................................................................................ 12
3.2 Processor mode ............................................................................................................................................. 14
3.3 Register description .......................................................................................................................................16
3.4 Watchdog / timer ........................................................................................................................................... 19
3.5 FIFOs ............................................................................................................................................................ 20
3.6 External SRAM ............................................................................................................................................. 25
3.7 Busy synchronisation ....................................................................................................................................26
4 Register bit description ..................................................................................................................................28
4.1 Register bit description of S/T section ........................................................................................................... 28
4.2 Register bit description of PCM30 bus section ............................................................................................. 31
4.3 Register bit description of CONNECT register ............................................................................................. 33
4.4 Register bit description of interrupt, status and control registers ...................................................................34
5 Electrical characteristics ................................................................................................................................38
6 Timing characteristics....................................................................................................................................40
6.1 ISA-PC bus or processor access .................................................................................................................... 40
6.2 SRAM access ................................................................................................................................................ 41
6.3 PCM30 bus clock and data alignment for Mitel ST
6.4 PCM30 timing ............................................................................................................................................... 42
March 1997
1.2.1 ISA-PC mode ........................................................................................................................................... 5
1.2.2 Processor interface modes ........................................................................................................................ 5
3.1.1 Programming of I/O addresses ............................................................................................................... 12
3.1.2 ISA-PC bus interface ............................................................................................................................. 13
3.2.1 DMA access in processor mode ............................................................................................................. 15
3.3.1 FIFO control registers ............................................................................................................................ 16
3.3.2 Registers of the S/T section ................................................................................................................... 17
3.3.3 Registers of the PCM30 bus section ......................................................................................................18
3.3.4 Interrupt and status register .................................................................................................................... 19
3.5.1 FIFO channel operation ......................................................................................................................... 21
3.5.2 Transparent mode of HFC-S .................................................................................................................. 24
3.7.1 Busy synchronisation with status read ...................................................................................................26
3.7.2 Busy synchronisation with IOCHRDY ..................................................................................................27
3.5.1.1 Send channels (B1, B2 and D transmit) ......................................................................................... 21
3.5.1.2 FIFO full condition in send channels ............................................................................................. 22
3.5.1.3 Receive Channels (B1, B2 and D reiceive) .................................................................................... 22
3.5.1.4 FIFO full condition in receive channels ......................................................................................... 23
3.5.1.5 FIFO initialisation .......................................................................................................................... 24
TM
bus ............................................................................ 42
HFC-S
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