HFC-S Cologne Chip AG, HFC-S Datasheet - Page 18

• Manufacturer Part Number: HFC-S
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

3.3.3 Registers of the
PCM30 bus timeslot selection registers
PCM30 bus data registers
PCM30 bus configuration registers
March 1997
CIP / I/O-address
00100000 20h
00100001 21h
00100010 22h
00100011 23h
00100100 24h
00100101 25h
00100110 26h
00100111 27h
CIP / I/O-address
00101000 28h
00101001 29h
00101010 2Ah
00101011 2Bh
CIP / I/O-address
00101110 2Eh
00101111 2Fh
*)
**)
These registers are read/written automatically by the HDLC FIFO controller (HFC) or by he
S/T controller and need not be accessed by the user.
These registers can also be accessed by DMA
Name
B1_SSL
B2_SSL
AUX1_SSL
AUX2_SSL
B1_RSL
B2_RSL
AUX1_RSL
AUX2_RSL
Name
B1_D
B2_D
AUX1_D
AUX2_D
Name
MST_MODE w
CONNECT
PCM30
*)
*)
**)
**)
bus section
r/w
w
w
w
w
w
w
w
w
r/w
r/w
r/w
r/w
r/w
r/w
w
Function
B1-channel transmit slot (0..31)
B2-channel transmit slot (0..31)
AUX1-channel transmit slot (0..31)
AUX2-channel transmit slot (0..31)
B1-channel receive slot (0..31)
B2-channel receive slot (0..31)
AUX1-channel receive slot (0..31)
AUX2-channel receive slot (0..31)
Function
PCM30 bus B1-channel data register
PCM30 bus B2-channel data register
AUX1-channel data register
AUX2-channel data register
Function
mode register for PCM30 bus
connect functions for S/T, HFC, PCM30
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HFC-S