HFC-S Cologne Chip AG, HFC-S Datasheet - Page 19

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HFC-S

Manufacturer Part Number
HFC-S
Description
Isdn S/t HDLC Basic Rate Controller
Manufacturer
Cologne Chip AG
Datasheet

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3.3.4 Interrupt and status register
3.4
The watchdog function of the HFC-S has two different modes which can be selected by bit 5 of the
CTMT register.
In the first mode the watchdog timer expires after the selected time if the timer has been reset and the
INT_S1 register is not read during the watchdog timer period.
In the second mode the watchdog timer expires after the selected time if no HFC-S register is
accessed during the watchdog timer period. In this mode every access to the HFC-S resets the
watchdog and the timer.
March 1997
CIP / I/O address
00011000 18h
00011001 19h
00011010 1Ah
00011011 1Bh
00011110 1Eh
00011100 1Ch
00011101 1Dh
Watchdog / timer
Name
CIRM
CTMT
INT_M1
INT_M2
INT_S1
STATUS
STATUS_DISBUSY
r/w
w
w
w
w
r
r
Function
interrupt selection and softreset register
transparent mode and time control register
interrupt mask register 1
interrupt mask register 2 and B-channel mode
register (64 kbit/s or 56 kbit/s)
interrupt status register
common status register
same as STATUS register but also locks busy-
nobusy transition (see also 3.7.1)
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HFC-S

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