GS1560A Gennum Corporation, GS1560A Datasheet - Page 8

• Manufacturer Part Number: GS1560A
• Description: Reclocking Deserializer For HD-SDI, Sd-sdi & Dvb-asi With Loop Thru Cable Driver. 3.3/1.8V Supply.
• Manufacturer: Gennum Corporation

1.2 PIN DESCRIPTIONS (CONTINUED)
GENNUM CORPORATION
NUMBER
PIN DESCRIPTIONS (CONTINUED)
PIN DESCRIPTIONS (CONTINUED)
PIN DESCRIPTIONS (CONTINUED)
15,17
PIN
14
16
18
19
20
21
22
SMPTE_BYPASS
DDI_2, DDI_2
SDO_EN/DIS
CD_GND
CD_VDD
TERM2
NAME
RSET
CD2
Synchronous
Synchronous
Synchronous
TIMING
Analog
Analog
Analog
Non
Non
Non
-
-
Output
Power
Power
TYPE
Input /
Input
Input
Input
Input
Input
8 of 55
STATUS SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to indicate the presence of a serial digital input signal. Normally
generated by a Gennum automatic cable equalizer.
When LOW, the serial digital input signal received at the DDI2 and DDI2
pins is considered valid.
When HIGH, the associated serial digital input signal is considered to be
invalid. In this case, the LOCKED signal is set LOW and all parallel outputs
are muted.
Differential input pair for serial digital input 2.
Termination for serial digital input 2. AC couple to PDBUFF_GND.
CONTROL SIGNAL INPUT / STATUS SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
This pin will be an input set by the application layer in slave mode, and will
be an output set by the device in master mode.
Master Mode (MASTER/SLAVE = HIGH)
The SMPTE_BYPASS signal will be HIGH only when the device has locked
to a SMPTE compliant data stream. It will be LOW otherwise.
Slave Mode (MASTER/SLAVE = LOW)
When set HIGH in conjunction with DVB_ASI = LOW, the device will be
configured to operate in SMPTE mode. All I/O processing features may be
enabled in this mode.
When set LOW, the device will not support the descrambling, decoding or
word alignment of received SMPTE data. No I/O processing features will
be available.
Used to set the serial digital loop-through output signal amplitude.
Connect to CD_VDD through 281 Ω +/- 1% for 800mV
output swing.
Power supply connection for the serial digital cable driver. Connect to
+1.8V DC analog.
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to enable or disable the serial digital output loop-through stage.
When set LOW, the serial digital output signals SDO and SDO are
disabled and become high impedance.
When set HIGH, the serial digital output signals SDO and SDO are
enabled.
Ground connection for the serial digital cable driver. Connect to analog
GND.
DESCRIPTION
p-p
single-ended
27360-1