GS1560A Gennum Corporation, GS1560A Datasheet - Page 7

• Manufacturer Part Number: GS1560A
• Description: Reclocking Deserializer For HD-SDI, Sd-sdi & Dvb-asi With Loop Thru Cable Driver. 3.3/1.8V Supply.
• Manufacturer: Gennum Corporation

1.2 PIN DESCRIPTIONS (CONTINUED)
GENNUM CORPORATION
NUMBER
PIN DESCRIPTIONS (CONTINUED)
PIN DESCRIPTIONS (CONTINUED)
PIN DESCRIPTIONS (CONTINUED)
PIN
11
12
13
IOPROC_EN/DIS
20bit/10bit
SD/HD
NAME
Synchronous
Synchronous
Synchronous
TIMING
Non
Non
Non
Output
TYPE
Input /
Input
Input
7 of 55
CONTROL SIGNAL INPUT / STATUS SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
This pin will be an input set by the application layer in slave mode, and will
be an output set by the device in master mode.
Master Mode (MASTER/SLAVE = HIGH)
The SD/HD signal will be LOW whenever the received serial digital signal
is 1.485Gb/s or 1.485/1.001Gb/s.
The SD/HD signal will be HIGH whenever the received serial digital signal
is 270Mb/s.
Slave Mode (MASTER/SLAVE = LOW)
When set LOW, the device will be configured for the reception of
1.485Gb/s or 1.485/1.001Gb/s signals only and will not lock to any other
serial digital signal.
When set HIGH, the device will be configured for the reception of 270Mb/s
signals only and will not lock to any other serial digital signal.
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to select the output data bus width in SMPTE or Data-Through
modes. This signal is ignored in DVB-ASI mode.
When set HIGH, the parallel output will be 20-bit demultiplexed data.
When set LOW, the parallel outputs will be 10-bit multiplexed data.
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to enable or disable I/O processing features.
When set HIGH, the following I/O processing features of the device are
enabled:
•
•
•
•
•
•
To enable a subset of these features, keep IOPROC_EN/DIS HIGH and
disable the individual feature(s) in the IOPROC_DISABLE register
accesible via the host interface.
When set LOW, the I/O processing features of the device are disabled,
regardless of whether the features are enabled in the IOPROC_DISABLE
register.
EDH CRC Error Correction (SD-only)
ANC Data Checksum Correction
Line-based CRC Error Correction (HD-only)
Line Number Error Correction (HD-only)
TRS Error Correction
Illegal Code Remapping
DESCRIPTION
27360-1