MSC8144 Freescale Semiconductor, MSC8144 Datasheet - Page 58

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MSC8144

Manufacturer Part Number
MSC8144
Description
Quad Core Digital Signal Processor
Manufacturer
Freescale Semiconductor
Datasheet

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2.7.10.6
Table 47 presents the RGMII AC timing specifications for applications requiring an on-board delayed clock.
Table 48 presents the RGMII AC timing specification for applications required non-delayed clock on board.
58
Data to clock output skew (at transmitter)
Data to clock input skew (at receiver)
Clock cycle duration
Duty cycle for 1000Base-T
Duty cycle for 10BASE-T and 100BASE-TX
Rise time (20%–80%)
Fall time (20%–80%)
GTX_CLK125 reference clock period
GTX_CLK125 reference clock duty cycle
Notes:
Data to clock output skew (at transmitter)
Data to clock input skew (at receiver)
Clock cycle duration
Duty cycle for 1000Base-T
Duty cycle for 10BASE-T and 100BASE-TX
Rise time (20%–80%)
Fall time (20%–80%)
GTX_CLK125 reference clock period
1.
2.
3.
4.
5.
6.
7.
ETHSYNC_IN
ETHRXD
ETHCLOCK
At recommended operating conditions with LV
This implies that PC board design will require clocks to be routed such that an additional trace delay of greater than 1.5 ns will
be added to the associated clock signal.
For 10 and 100 Mbps, t
Duty cycle may be stretched/shrunk during speed changes or while transitioning to a received packet's clock domains as long
as the minimum duty cycle is not violated and stretching occurs for no more than three t
between.
Duty cycle reference is L
This symbol is used to represent the external GTX_CLK125 and does not follow the original symbol naming convention.
GCR4 should be programmed as 0x00001004.
ETHSYNC
ETHTXD
RGMII AC Timing Specifications
3
3
Table 48. RGMII with No On-Board Delay AC Timing Specifications
4, 5
4, 5
Table 47. RGMII with On-Board Delay AC Timing Specifications
Parameter/Condition
Parameter/Condition
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 1
2
2
RGT
Vdd
scales to 400 ns +/- 40 ns and 40 ns +/- 4 ns, respectively.
/2.
3, 5
3, 5
t
SMDVKH
Figure 31. SMII Mode Signal Timing
Valid
DD
of 2.5 V +/- 5%.
Valid
t
SMXR
t
SMDXKH
t
t
t
G125H
t
t
RGTH
RGTH
RGTH
RGTH
Symbol
Symbol
t
t
t
t
SKEWR
SKEWR
SKEWT
t
t
t
SKEWT
t
t
t
t
RGTR
RGTF
G12
t
RGTR
RGTF
G12
RGT
RGT
/t
/t
/t
/t
/t
RGT
RGT
G125
RGT
RGT
6
6
RGT
Min
-0.5
Min
-0.5
0.9
7.2
0.9
7.2
45
40
47
45
40
Valid
of the lowest speed transitioned
Freescale Semiconductor
Typ
Typ
8.0
8.0
8.0
8.0
50
50
50
50
Max
0.75
0.75
Max
0.75
0.75
0.5
2.6
8.8
2.6
0.5
8.8
55
60
53
55
60
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
%
%
%

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