MSC8144 Freescale Semiconductor, MSC8144 Datasheet - Page 47

• Manufacturer Part Number: MSC8144
• Description: Quad Core Digital Signal Processor
• Manufacturer: Freescale Semiconductor

Freescale Semiconductor
Total Jitter Tolerance
Multiple Input Skew
Bit Error Rate
Unit Interval
Differential Input Voltage
Deterministic Jitter Tolerance
Combined Deterministic and Random
Jitter Tolerance
Total Jitter Tolerance
Multiple Input Skew
Bit Error Rate
Unit Interval
Differential Input Voltage
Deterministic Jitter Tolerance
Combined Deterministic and Random
Jitter Tolerance
Total Jitter Tolerance
Multiple Input Skew
Characteristic
Characteristic
Characteristic
Table 34. Receiver AC Timing Specifications—1.25 GBaud (continued)
Table 36. Receiver AC Timing Specifications—3.125 GBaud
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 1
Table 35. Receiver AC Timing Specifications—2.5 GBaud
Symbol
Symbol
Symbol
BER
BER
J
J
S
V
S
V
S
J
J
J
UI
J
UI
J
DR
DR
MI
IN
MI
IN
MI
T
D
T
D
T
0.65
0.37
0.55
0.65
0.37
0.55
0.65
Min
800
Min
200
400
Min
200
Range
Range
Range
10
10
1600
1600
Max
Max
Max
800
400
24
24
22
–12
–12
mV
mV
UI
UI
UI
UI
UI
UI
UI
Unit
Unit
Unit
ns
ns
ns
ps
ps
PP
PP
PP
PP
PP
PP
PP
PP
PP
Measured at receiver. Total jitter is composed of
three components, deterministic jitter, random jitter
and single frequency sinusoidal jitter. The sinusoidal
jitter may have any amplitude and frequency in the
unshaded region of Figure 14. The sinusoidal jitter
component is included to ensure margin for low
frequency jitter, wander, noise, crosstalk and other
variable system effects.
Skew at the receiver input between lanes of a
multilane link
±100 ppm
Measured at receiver
Measured at receiver
Measured at receiver
Measured at receiver. Total jitter is composed of
three components, deterministic jitter, random jitter
and single frequency sinusoidal jitter. The sinusoidal
jitter may have any amplitude and frequency in the
unshaded region of Figure 14. The sinusoidal jitter
component is included to ensure margin for low
frequency jitter, wander, noise, crosstalk and other
variable system effects.
Skew at the receiver input between lanes of a
multilane link
±100 ppm
Measured at receiver
Measured at receiver
Measured at receiver
Measured at receiver. Total jitter is composed of
three components, deterministic jitter, random jitter
and single frequency sinusoidal jitter. The sinusoidal
jitter may have any amplitude and frequency in the
unshaded region of Figure 14. The sinusoidal jitter
component is included to ensure margin for low
frequency jitter, wander, noise, crosstalk and other
variable system effects.
Skew at the receiver input between lanes of a
multilane link
Notes
Notes
Notes
Electrical Characteristics
47