MSC7115 Motorola Semiconductor Products, MSC7115 Datasheet - Page 50

• Manufacturer Part Number: MSC7115
• Manufacturer: Motorola Semiconductor Products

Hardware Design Considerations
3.4.3.2
When the MSC7115 device is configured to boot from the I
I
For details on the boot procedure, see the “Boot Program” chapter of the MSC711x Reference Manual.
3.5
MSC7115 devices contain a memory controller that provides a glueless interface to external double data rate (DDR) SDRAM
memory modules with Class 2 Series Stub Termination Logic 2.5 V (SSTL_2). There are two termination techniques, as shown
in
Figure 33
50
2
C pins as I
Figure
•
•
•
•
Technique A
Technique B
I
EPROM in slave mode.
RS = 22 Ω
RT = 24 Ω
32. Technique B is the most popular termination technique.
2
illustrates the power wattage for the resistors. Typical values for the resistors are as follows:
C in master mode.
2
C pins. The I
DDR Memory System Guidelines
I
2
C Boot
MSC7115 Low-Cost 16-bit DSP with DDR Controller Data Sheet, Rev. 11
Chip Selects
2
Chip Selects
Controller
C interface is configured as follows:
Controller
Command
Command
Address
Strobes
Address
Strobes
VREF
Mask
Mask
Data
Data
Figure 32. SSTL Termination Techniques
SSTL_2
SSTL_2
SSTL_2
SSTL_2
SSTL_2
SSTL_2
RS
RS
RS
RS
2
C port, the boot program configures the GPIO pins shared with the
V
TT
Bank
DDR
Bank
DDR
Bank
DDR
Bank
DDR
Freescale Semiconductor
Generator
Generator
V
RT
RT
V
RT
RT
TT
TT