HD49351BP Renesas Electronics Corporation., HD49351BP Datasheet - Page 14

• Manufacturer Part Number: HD49351BP
• Description: Cds/pga & 10-bit A/d Tg Converter
• Manufacturer: Renesas Electronics Corporation.

HD49351BP/HBP
Absolute Maximum Ratings
Item
Power supply voltage
Power dissipation
Operating power supply voltage
Analog input voltage
Digital input voltage
Operating temperature
Storage temperature
Note: AVdd, AVss are analog power
Electrical Characteristics
• Items Common to CDS_in and ADC_in Input Modes
Item
Power supply voltage
range
Conversion frequency
Digital input voltage
Digital output voltage
Digital input current
Digital output current
ADC resolution
ADC integral linearity
ADC differential linearity
Sleep current
Standby current
Digital output Hi-Z delay
time
Notes: 1. It is expressing on the frequency in an analog circuit part. Please keep in your mind that TG part has 2
Rev.1.0, Jul 06, 2004, page 14 of 28
DVdd1, DVss1 are digital power source systems of CDS, PGA and ADC.
DVdd2, DVss2 are buffer power source systems of ADC output.
DVdd3, DVss3 are general digital power source systems of TG.
DVdd4, DVss4 are buffer power source systems of H1 and H2.
2. Differential linearity is the calculated difference in linearity errors between adjacent codes.
3. Values within parentheses ( ) are for reference.
• Pin 2 multi bonds the DVss1 and DVss2
• When pin 64 is set to Low, pin 41 = STROB output, pin 39 = SUB_SW output
When Hi, pin 41 = Vgate input, pin 39 = ADCLK input
divided, 3 divided mode.
Symbol
Vdd
f
f
V
V
V
V
I
I
I
I
RES
INL
DNL
I
I
t
t
t
t
CLK
CLK
IH
IL
OZH
OZL
SLP
STBY
HZ
LZ
ZH
ZL
IH2
IL2
OH
OL
hi
low
Min
2.70
20
5.5
2.25
0
DVdd –0.5
—
—
–50
—
–50
—
—
—
–100
—
—
—
—
—
Symbol
Vdd(max)
Pt(max)
Vopr
V
V
Topr
Tstg
source systems
(Unless specified, Ta = 25°C, AVdd = 3.0 V, DVdd = 3.0 V, and R
IN
I
(max)
(max)
DVdd
3.0
3
Typ
3.00
—
—
—
—
—
—
—
—
—
—
10
(2)
(±0.3)
0
—
—
—
—
of CDS, PGA, and ADC.
Max
3.45
36
25
DVdd
0.6
—
0.5
50
—
50
—
—
—
—
100
5
100
100
100
100
Ratings
4.1
500
2.70 to 3.45
–0.3 to AVdd +0.3
–0.3 to DVdd +0.3
–10 to +75
–55 to +125
DVdd
3.0
Unit
V
MHz
MHz
V
V
V
V
µA
µA
µA
µA
bit
LSBp-p
LSB
µA
mA
ns
ns
ns
ns
Test Conditions
LoPwr = low *
LoPwr = high
I
I
DVdd = V
V
V
V
f
f
Fix digital input pin
to 0 V, output pin
should open
Fix digital I/O pin to
0 V
R
C
OH
OL
CLK
CLK
IL
OH
OL
L
L
= 2 kΩ,
= 10 pF
= +1 mA
= 0 V
= –1 mA
= 0 V
= 20 MHz
= 20 MHz
= Vdd
IH
= 3.0 V
1
Unit
V
mW
V
V
V
°C
°C
Remarks
HD49351HBP
HD49351BP
All of digital input
pin
*2
Refer to figure 7
BIAS
(Ta = 25°C)
= 33 kΩ)