HD49351BP Renesas Electronics Corporation., HD49351BP Datasheet - Page 10

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HD49351BP

Manufacturer Part Number
HD49351BP
Description
Cds/pga & 10-bit A/d Tg Converter
Manufacturer
Renesas Electronics Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD49351BP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
HD49351BP/HBP
Timing Chart
Figure 2 shows the timing chart when CDS_in and ADC_in input modes are used.
• The ADC output (D0 to D9) is output at the rising edge of the ADCLK in both modes.
• Pipe-line delay is ten clock cycles when CDS_in is used and nine when ADC_in is used.
• In ADC_in input mode, the input signal is sampled at the rising edge of the ADCLK.
Rev.1.0, Jul 06, 2004, page 10 of 28
CDS_in
SP1
SP2
ADCLK
D0 to D9
ADC_in
ADCLK
D0 to D9
When CDS_in input mode is used
When ADC_in input mode is used
Figure 2 Output Timing Chart when CDS_in and ADC_in Input Modes are Used
N
0
N 10
N 9
N
N+1
1
N+1
N 9
N 8
N+2
2
N+2
N 8
N+8
~
N 1
N+9
9
N+9
N 1
N
N+10
10
N+10
N+1
N
N+11
11
N+11

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