N25Q128 Numonyx, N25Q128 Datasheet - Page 3
N25Q128
Manufacturer Part Number
N25Q128
Description
128-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase On Boot Sectors, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet
1.N25Q128.pdf
(180 pages)
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6
5.3
Volatile and Non Volatile Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
6.1
6.2
6.3
6.4
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
Quad SPI (QIO-SPI)Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
Legacy SPI Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
Non Volatile Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
Volatile Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.3.1
6.3.2
Volatile Enhanced Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . 41
Dual Command Fast reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Page programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Subsector Erase, Sector Erase and Bulk Erase . . . . . . . . . . . . . . . . . . 28
Polling during a Write, Program or Erase cycle . . . . . . . . . . . . . . . . . . . 28
Read and Modify registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Active Power and Standby Power modes . . . . . . . . . . . . . . . . . . . . . . . 28
HOLD (or Reset) condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Multiple Read Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Quad Command Fast reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
QUAD Command Page programming . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Subsector Erase, Sector Erase and Bulk Erase . . . . . . . . . . . . . . . . . . 30
Polling during a Write, Program or Erase cycle . . . . . . . . . . . . . . . . . . . 30
Read and Modify registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Active Power and Standby Power modes . . . . . . . . . . . . . . . . . . . . . . . 31
HOLD (or Reset) condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
VPP pin Enhanced Supply Voltage feature . . . . . . . . . . . . . . . . . . . . . . 31
WIP bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
WEL bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
BP3, BP2, BP1, BP0 bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
TB bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
SRWD bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Dummy clock cycle NV configuration bits (NVCR bits from 15 to 12) . . 37
XIP NV configuration bits (NVCR bits from 11 to 9) . . . . . . . . . . . . . . . . 38
Output Driver Strength NV configuration bits (NVCR bits from 8 to 6) . . 38
Fast POR NV configuration bit (NVCR bit 5) . . . . . . . . . . . . . . . . . . . . . 38
Hold (Reset) disable NV configuration bit (NVCR bit 4) . . . . . . . . . . . . 38
Quad Input NV configuration bit (NVCR bit 3) . . . . . . . . . . . . . . . . . . . . 38
Dual Input NV configuration bit (NVCR bit 2) . . . . . . . . . . . . . . . . . . . . . 39
Dummy clock cycle: VCR bits 7 to 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
XIP Volatile Configuration bits (VCR bit 3) . . . . . . . . . . . . . . . . . . . . . . . 41
3/180