N25Q128 Numonyx, N25Q128 Datasheet - Page 114

• Manufacturer Part Number: N25Q128
• Description: 128-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase On Boot Sectors, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

9.2.2
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DQ0
DQ1
C
S
0
DQ0
DQ1
S
C
Instruction
1
2
Figure 42. Multiple I/O Read Identification instruction and data-out sequence DIO-
Dual Command Fast Read (DCFR)
The Dual Command Fast Read (DCFR) instruction allows to read the memory in DIO-SPI
protocol, parallelizing the instruction code, the address and the output data on two pins
(DQ0 and DQ1). The Dual Command Fast Read (DCFR) instruction can be issued, when
the device is set in DIO-SPI mode, by sending to the memory indifferently one of the 3
instructions codes: 0Bh, 3Bh or BBh, the effect is exactly the same. The 3 instruction codes
are all accepted to help the application code porting from Extended SPI protocol to DIO-SPI
protocol.
Apart for the parallelizing on two pins of the instruction code, the Dual Command Fast Read
instruction functionality is exactly the same as the Dual I/O Fast Read of the Extended SPI
protocol, please refer to
Figure 43. Dual Command Fast Read instruction and data-out sequence DIO-SPI
3
23 21 19 17
22 20 18 16
4
5
6
SPI
7
24-Bit Address
0
15 13 11 9
14 12 10 8
8
1
AFh
9 10 11
2
Section 9.1.5: Dual I/O Fast Read
3
12 13 14 15
7
6
7
6
5
4
4
3
2
5
4
MAN.
code
5
1
0
3
2
6
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
1
0
7
Dummy cycles
7
6
8
5
4
DEV.
code
9 10 11 12 13 14 15
3
2
1
0
for further details.
7
6
7
MSB
6
Data Out 1
SIZE
code
Dual_Multi_Read_IO
5
4
5
4
Dual_Command_Fast_Read
3
2
3
2
1
0
1
0
MSB
6
7
Data Out n
4
5
2
3
0
1