S1D13700F01 Epson Electronics America, Inc., S1D13700F01 Datasheet - Page 130

• Manufacturer Part Number: S1D13700F01
• Description: Embedded Memory Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Page 130
X42A-A-001-04
S1D13700F01
X42A-A-002-04
• all changes from the last revision of the spec are highlighted in Red
• section 5.2, for all pin tables, changed the “RESET# State” column to “RESET#/Power
• section 5.2, for all pin tables, changed all input pins from “Z” to “—”
• section 5.2, added “X” and “—” to the RESET# and Power On State definitions
• section 7.3.1, for the Generic Bus Direct/Indirect Interface with WAIT# Timing
• section 7.3.1, for the Generic Bus Direct/Indirect Interface with WAIT# Timing table,
• section 7.3.2, for the Generic Bus Direct/Indirect Interface without WAIT# Timing
• section 7.3.2, for the Generic Bus Direct/Indirect Interface without WAIT# Timing
• section 7.3.3, for the MC68K Family Bus Direct/Indirect Interface with DTACK#
• section 7.3.5, for the M6800 Family Bus Indirect Interface Timing diagram, removed
• section 7.5, for the Single Monochrome 4-bit Panel AC Timing table, removed Note 1
• REG[03h], for the Character Bytes Per Row bits, changed the maximum from “239” to
• REG[04h], for the Total Character Bytes Per Row bits, changed the formula from
• section 11.1.1, fixed an inconsistency in the description of SYSTEM SET parameter P1,
• section 12.5.6, added new section with use cases for Horizontal Pixel Scrolling
• section 17, updated the “State of LCD Pins During Power Save Mode” table as follows:
Revision 4.05
On State”
diagram, changed t10 to be from CS# rising edge instead of RD# rising edge
changed the t10 parameter description to be from CS# rising edge instead of RD# rising
edge
diagram, changed t8 to be from CS# rising edge instead of RD# rising edge
table, changed the t8 parameter description to be from CS# rising edge instead of RD#
rising edge
Timing diagram, changed t8 to extend to the edge where DTACK# goes high impedance
reference to MR# and changed “RD# (LDS#, UDS#)” to “RD# (E)”
about Ts, changed Note 2 to Note 1, and added new note with correct formula for t10
“253”
“0<=[TC/R]<=255” to “2<=TC/R<=255”
bit 4 should be 1b according to the value of the Reserved bit REG[00h] bit 4
FPSHIFT state during display off changed to “X”
WAIT# state during display off changed to “—”
DB[7:0] state during display off changed to “—”
XCD1 pin changed to “XCD1 / XCG1”
XCD1 / XCG1 state during display off changed to “Running”
XCD1 / XCG1 state during power save mode changed to “Stopped”
Change Record
Revision 4.05
Epson Research and Development
Hardware Functional Specification
Vancouver Design Center
Issue Date: 2005/12/13