A43P26161 AMIC Technology, Corp., A43P26161 Datasheet - Page 30

• Manufacturer Part Number: A43P26161
• Description: 1M x 16-Bit x 4 Banks Low Power Synchronous DRAM
• Manufacturer: AMIC Technology, Corp.

PRELIMINARY
Read & Write Cycle with Auto Precharge @Burst Length=4
CLOCK
A10/AP
ADDR
RAS
CAS
(CL=2)
(CL=3)
CKE
BS1
BS0
DQM
CS
DQ
DQ
WE
*Note : tRCD should be controlled to meet minimum tRAS before internal precharge start.
0
Row Active
(A-Bank)
RAa
RAa
1
(In the case of Burst Length=1 & 2, BRSW mode)
(July, 2005, Version 1.1)
2
3
Row Active
(D-Bank)
RBb
RBb
4
Auto Precharge
Read with
(A-Bank)
CAa
5
6
QAa0
7
QAa1
QAa0
Auto Precharge
(A-Bank/CL=2)
8
Start Point
QAa2
QAa1
9
Auto Precharge
29
(A-Bank/CL=3)
High
Start Point
QAa2
QAa3
10
QAa3
11
12
Auto Precharge
13
Write with
(D-Bank)
DDb0 DDb1 DDb2 DDb3
DDb0
CBb
14
AMIC Technology, Corp.
DDb1 DDb2 DDb3
15
16
17
A43P26161
: Don't care
Auto Precharge
18
Start Point
(D-Bank)
19