A43P26161 AMIC Technology, Corp., A43P26161 Datasheet - Page 19

• Manufacturer Part Number: A43P26161
• Description: 1M x 16-Bit x 4 Banks Low Power Synchronous DRAM
• Manufacturer: AMIC Technology, Corp.

8. Burst Stop & Interrupted by Precharge
9. MRS
PRELIMINARY
DQ(CL2)
DQ(CL3)
Note : 1. t
1) Normal Write (BL=4)
1) Read Interrupted by Precharge (BL=4)
CMD
DQM
DQ
CMD
CLK
CLK
2. t
3. Number of valid output data after row precharge or burst stop: 1,2 for CAS latency = 2, 3 respectively.
4. PRE: All banks precharge if necessary.
Read or write burst stop command is valid at every burst length.
MRS can be issued only when all banks are in precharged state.
Mode Register Set
RDL
BDL
CMD
CLK
: 1CLK
(July, 2005, Version 1.1)
: 1CLK; Last data in to burst stop delay.
WR
RD
D0
PRE
D1
PRE
Note 1
Q0
D2
t
t
RP
RDL
D3
Q1
Q0
Note 1
Note 3
1
PRE
Q1
MRS
2
2CLK
ACT
18
DQ(CL2)
DQ(CL3)
4) Read Burst Stop (BL=4)
2) Write Burst Stop (BL=8)
CMD
CMD
DQM
DQ
CLK
CLK
RD
WR
D0
D1
AMIC Technology, Corp.
STOP
Q0
D2
Q1
Q0
D3
t
BDL
1
A43P26161
STOP
Note 2
Q1
D4
2
D5