FDMS3624S Fairchild Semiconductor, FDMS3624S Datasheet
FDMS3624S
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FDMS3624S Summary of contents
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... Package Marking and Ordering Information Device Marking Device 08OD FDMS3624S 07OD ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev.C2 General Description This device includes two specialized N-Channel MOSFETs 17.5 A dual PQFN package. The switch node has been internally connected to enable easy placement and routing of synchronous D buck converters ...
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... Q Total Gate Charge g Q Total Gate Charge g Q Gate to Source Gate Charge gs Q Gate to Drain “Miller” Charge gd ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev. °C unless otherwise noted J Test Conditions = 250 μ mA 250 μ ...
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... based on starting N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied. ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev. °C unless otherwise noted J Test Conditions 17 ...
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... DUTY CYCLE = 0.5% MAX 150 0.5 1.0 1 GATE TO SOURCE VOLTAGE (V) GS Figure 5. Transfer Characteristics ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev. 25°C unless otherwise noted J μ s 0.9 1.2 1 100 125 150 - 0.01 0.001 2 ...
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... MAX RATED 125 C/W θ 0.01 0.01 0 DRAIN to SOURCE VOLTAGE (V) DS Figure 11. Forward Bias Safe Operating Area ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev. 25°C unless otherwise noted J 2000 1000 100 ...
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... Typical Characteristics (Q1 N-Channel) 2 DUTY CYCLE-DESCENDING ORDER 0.5 0.2 0.1 0.05 0.1 0.02 0.01 0.01 0.001 - Figure 13. ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev. 25°C unless otherwise noted J SINGLE PULSE 125 C/W θ JA (Note 1b RECTANGULAR PULSE DURATION (sec) Junction-to-Ambient Transient Thermal Response Curve ...
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... 125 1.0 1.5 2 GATE TO SOURCE VOLTAGE (V) GS Figure 18. Transfer Characteristics ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev. °C unless otherwise noted J μ s 0.9 1.2 1.5 Figure 15. Normalized on-Resistance vs Drain 50 75 100 125 150 200 100 ...
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... MAX RATED J 0 120 C/W θ 0.01 0.01 0 DRAIN to SOURCE VOLTAGE (V) DS Figure 24. Forward Bias Safe Operating Area ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev. 25°C unless otherwise noted J 10000 1000 100 100 ...
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... Typical Characteristics (Q2 N-Channel) 2 DUTY CYCLE-DESCENDING ORDER 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 0.001 0.0001 - Figure 26. Junction-to-Ambient Transient Thermal Response Curve ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev. °C unless otherwise noted J SINGLE PULSE 120 C/W θ JA (Note 1b RECTANGULAR PULSE DURATION (sec ...
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... TIME (ns) Figure 27. FDMS3624S SyncFET body diode reverse recovery characteristic ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev.C2 (continued) Schottky barrier diodes exhibit significant leakage at high tem- perature and high reverse voltage. This will increase the power in the device ...
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... Dimensional Outline and Pad Layout 0. PKG L C PIN #1 IDENT MAY 1 A PPEAR AS OPTIONAL 0.58 0.38 0.35 6X 3.90 3.70 0.58 8 0.38 0.44 0.24 BOTTO M VIEW 0.10 C 0.08 C 1.10 0.90 ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev.C2 5.10 4.90 A PKG 0.63 6.10 5.90 2.15 4.16 2.13 0. VIEW 0.63 SEE DETAIL A RECOM MENDE D LAND PATTERN SIDE VIEW 0. 3.00 0.70 0.05 C 2.80 0.50 1. ...
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... Definition of Terms Datasheet Identification Product Status Advance Information Formative / In Design Preliminary First Production No Identification Needed Full Production Obsolete Not In Production ©2011 Fairchild Semiconductor Corporation FDMS3624S Rev.C2 ® tm ® PowerTrench SM PowerXS™ Programmable Active Droop™ ® QFET QS™ Quiet Series™ ...