LPC2926_27_29 NXP Semiconductors, LPC2926_27_29 Datasheet - Page 25

• Manufacturer Part Number: LPC2926_27_29
• Description: The LPC2926/2927/2929 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2926_27_29
Product data sheet
A timing diagram for writing to external memory is shown In
between wait-state settings is indicated with arrows.
Fig 5.
Fig 6.
(1) BLS has the same timing as WE in configurations that use the byte lane enable signals to connect
Reading from external memory
WSTOEN = 3, WST1 = 6
WSTWEN = 3, WST2 = 7
to write enable (8 bit devices).
Writing to external memory
WE/BLS
CLK(SYS)
All information provided in this document is subject to legal disclaimers.
CLK(SYS)
BLS
OE
CS
CS
Rev. 5 — 28 September 2010
(1)
D
A
A
D
WSTOEN
WSTWEN
ARM9 microcontroller with CAN, LIN, and USB
LPC2926/2927/2929
WST1
WST2
Figure
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6. The relationship
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© NXP B.V. 2010. All rights reserved.
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