AD9239 Analog Devices, AD9239 Datasheet - Page 31

• Manufacturer Part Number: AD9239
• Description: Quad, 12-Bit, 170 MSPS/210 MSPS/250 MSPS Serial Output 1.8 V ADC
• Manufacturer: Analog Devices

Specifications of AD9239

• Resolution (bits): 12bit
• # Chan: 4
• Sample Rate: 250MSPS
• Interface: Ser
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: 1.25 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

SERIAL PORT INTERFACE (SPI)
The AD9239 serial port interface allows the user to configure the
converter for specific functions or operations through a structured
register space provided in the ADC. This may provide the user
with additional flexibility and customization, depending on the
application. Addresses are accessed via the serial port and can
be written to or read from via the port. Memory is organized
into bytes that can be further divided into fields, as documented
in the Memory Map section. Detailed operational information
can be found in the Analog Devices, Inc.,
Note, Interfacing to High Speed ADCs via SPI.
Four pins define the SPI: SCLK, SDI/SDIO, SDO, and CSB (see
Table 13). The SCLK pin is used to synchronize the read and
write data presented to the ADC. The SDI/SDIO pin is a dual-
purpose pin that allows data to be sent to and read from the
internal ADC memory map registers. The CSB pin is an active
low control that enables or disables the read and write cycles.
Table 13. Serial Port Pins
Pin
SCLK
SDI/SDIO
SDO
CSB
The falling edge of the CSB in conjunction with the rising edge of
the SCLK determines the start of the framing sequence. During an
instruction phase, a 16-bit instruction is transmitted, followed by
one or more data bytes, which is determined by Bit Field W0 and
Bit Field W1. An example of the serial timing and its definitions
can be found in Figure 78 and Table 14.
During normal operation, CSB is used to signal to the device
that SPI commands are to be received and processed. When
CSB is brought low, the device processes SCLK and SDI/SDIO
to execute instructions. Normally, CSB remains low until the
communication cycle is complete. However, if connected to a
slow device, CSB can be brought high between bytes, allowing
older microcontrollers enough time to transfer data into shift
registers. CSB can be stalled when transferring one, two, or three
bytes of data. When W0 and W1 are set to 11, the device enters
streaming mode and continues to process data, either reading
or writing, until CSB is taken high to end the communication
cycle. This allows complete memory transfers without requiring
Function
Serial Clock. The serial shift clock input. SCLK is used
to synchronize serial interface reads and writes.
Serial Data Input/Output. A dual-purpose pin that
typically serves as an input or output, depending on
the SPI wire mode and instruction sent and the
relative position in the timing frame.
Serial Data Output is used only in 4-wire SPI mode.
When set, the SDO pin becomes active. When cleared,
the SDO pin remains in tristate, and all read data is
routed to the SDI/SDIO pin.
Chip Select Bar (Active Low). This control gates the
read and write cycles.
AN-877
Application
Rev. B | Page 31 of 40
additional instructions. Regardless of the mode, if CSB is taken
high in the middle of a byte transfer, the SPI state machine is
reset and the device waits for a new instruction.
In addition to the operation modes, the SPI port configuration
influences how the AD9239 operates. For applications that do
not require a control port, the CSB line can be tied and held
high. This places the SDI/SDIO pin into its secondary mode, as
defined in the SDI/SDIO Pin section. CSB can also be tied low to
enable 2-wire mode. When CSB is tied low, SCLK and SDI/SDIO
are the only pins required for communication. Although the
device is synchronized during power-up, the user should ensure
that the serial port remains synchronized with the CSB line
when using this mode. When operating in 2-wire mode, it is
recommended to use a 1-, 2-, or 3-byte transfer exclusively.
Without an active CSB line, streaming mode can be entered but
not exited.
In addition to word length, the instruction phase determines if
the serial frame is a read or write operation, allowing the serial
port to be used to both program the chip and read the contents
of the on-chip memory. If the instruction is a readback operation,
performing a readback causes the SDI/SDIO pin to change from
an input to an output at the appropriate point in the serial frame.
Data can be sent in MSB- or LSB-first mode. MSB-first mode
is the default at power-up and can be changed by adjusting the
configuration register. For more information about this and
other features, see the AN-877 Application Note, Interfacing to
High Speed ADCs via SPI.
HARDWARE INTERFACE
The pins described in Table 13 constitute the physical interface
between the user’s programming device and the serial port of
the AD9239. The SDO, SCLK and CSB pins function as inputs
when using the SPI. The SDI/SDIO pin is bidirectional, functioning
as an input during write phases and as an output during readback.
If multiple SDI/SDIO pins share a common connection, care
should be taken to ensure that proper V
the same load for each AD9239, Figure 77 shows the number of
SDI/SDIO pins that can be connected together and the resulting
V
either serial PROMS or PIC mirocontrollers, providing the
user with an alternative method, other than a full SPI controller,
to program the ADC (see the
For users who wish to operate the ADC without using the
SPI, remove any connections from the CSB, SCLK, SDO, and
SDI/SDIO pins. By disconnecting these pins from the control bus,
the ADC can function in its most basic operation. Each of these
pins has an internal termination that floats to its respective level.
OH
level. This interface is flexible enough to be controlled by
AN-812 Application
OH
levels are met. Assuming
Note).
AD9239