AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 85

• Manufacturer Part Number: AT32UC3C2512C Automotive
• Manufacturer: Atmel Corporation

8.5.5
8.5.6
9166C–AVR-08/11
1.8V Brown Out Detection (BOD18)
3.3V Brown Out Detection (BOD33)
Table 8-2.
The 1.8V Brown-Out Detector (BOD18) monitors the VDDCORE supply pin and compares the
supply voltage to the brown-out detection level, as set in BOD.LEVEL. The BOD18 is disabled
by default, but can be enabled either by software or by flash fuses. The 1.8V Brown-Out Detec-
tor can either generate an interrupt or a reset when the supply voltage is below the brown-out
detection level. In any case, the BOD18 output value is given by the PCLKSR.BODDET bit.
Note that any change to the BOD.LEVEL field of the BOD register should be done with the
BOD18 deactivated to avoid spurious reset or interrupt. When turned-on, the BOD18 output will
be masked during one half of a RCSYS clock cycle and two main clocks cycles to avoid false
results.
If the JTAG or the AWIRE is enabled, the BOD18 reset and interrupt will be masked.
See Electrical Characteristics for parametric details.
Although it is not recommended, it is still possible to override the default factory settings by writ-
ing to those registers. To prevent unexpected writes due to software bugs, write access to this
register is protected by a locking mechanism, for details please refer to the UNLOCK register
description.
The 3.3V Brown-Out Detector (BOD33) monitors the VDDIN_5 supply pin and compares the
supply voltage to the brown-out detection level, as set in BOD33.LEVEL. The BOD33 is disabled
by default, but can be enabled by software or by flash fuses. The 3.3V Brown-Out Detector can
generate an interrupt or a reset when the supply voltage is below the brown-out detection level.
In any case, the BOD33 value is given by the PCLKSR.BOD33DET bit.
Note that any change to the BOD33.LEVEL field of the BOD33 register should be done with the
BOD33 deactivated to avoid spurious interrupt. When turned-on, the BOD33 output will be
masked during one half of a RCSYS clock cycle and two main clocks cycles to avoid false
results.
Clock number
10
11
3
4
5
6
7
8
9
Generic clock allocation
Function
-
PWM
QDEC0
QDEC1
GCLK event, mapped to event number 16.
See the Module Configuration of PEVC for
more details.
GCLK event, mapped to event number 17.
See the Module Configuration of PEVC for
more details.
GCLK[0] output pin
GCLK[1] output pin
IISC
Name
GCLK_PWM
GCLK_QDEC0
GCLK_QDEC1
GCLK_IISC
AT32UC3C
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