AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 1119
AT32UC3C2512C Automotive
Manufacturer Part Number
AT32UC3C2512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
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36.7.2
Name:
Access Type:
Offset:
Reset Value:
• SUT: Start-up Time
• MUXSET: Mux Settle Time
• EXREF: External Reference
• SHD: Sample-and-Hold Disabled
• RS: Reference Source
• FRM: Free Running Mode
9166C–AVR-08/11
SHD
31
23
15
7
-
-
-
Number of ADC clock cycles to wait for: (STARTUP + 1) * 32.
1: The multiplexers settle time is set to 0.5 PB clock periods.
0: The multiplexers settle time is set to 1.5 PB clock periods.
1: The external forcing of references is enabled, ADC references are the ADCREFN and ADCREFP pads.
0: The external forcing of references is disabled, ADC reference is given by the RS field.
1: The Sample and Hold is disabled.
0: The Sample and Hold is enabled.
note: when set to one, sequencer 1 is turned off, as a consequence the ADC pipeline latency is decreased by one ADC clock
period.
0: Internal 1V reference.
1: Internal 0.6 *VDDANA reference.
2: External reference ADCREF0 over chip analog ground.
3: External reference ADCREF1 over chip analog ground.
1: The free running mode is enabled, sequencer 0 performs conversions continuously.
0: The free running modeis disabled.
note: once in this mode, sequencer 1 requests cannot be serviced.
Configuration Register
30
22
14
6
-
-
-
CFG
Read/Write
0x04
0x00000000
RS
29
21
13
5
-
-
FRM
28
20
12
4
-
-
SSMQ
27
19
11
3
-
-
SUT
MUXSET
SLEEP
26
18
10
2
-
EXREF
25
17
9
1
-
-
AT32UC3C
ADCEN
24
16
8
0
-
-
1119
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