AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 163

• Manufacturer Part Number: AT32UC3C2512C Automotive
• Manufacturer: Atmel Corporation

Figure 10-2. Basic Mode WDT Timing Diagram, normal operation.
Figure 10-3. Basic Mode WDT Timing Diagram, no clear within T
10.5.1.6
10.5.2
9166C–AVR-08/11
C L R .W D T C L R
W a tc h d o g re s e t
t= t
C LR .W D T C LR
W a tch d og re set
W rite o n e to
t= t
W rite o n e to
0
0
Window Mode
Watchdog Reset
If the WDT counter is not cleared within T
see
A watchdog reset will result in a reset and the code will start executing from the boot vector,
please refer to the Power Manager chapter for details. If the Disable After Reset (DAR) bit in the
CTRL Register is zero, the WDT counter will restart counting from zero when the watchdog reset
is released.
If the CTRL.DAR bit is one the WDT will be disabled after a watchdog reset. Only the CTRL.EN
bit will be changed after the watchdog reset. However, if WDTAUTO fuse is configured to enable
the WDT after a watchdog reset, and the CTRL.FCD bit is zero, writing a one to the CTRL.DAR
bit will have no effect.
The window mode can protect against tight loops of runaway code. This is obtained by adding a
ban period to timeout period. During the ban period clearing the WDT counter is not allowed.
If the WDT Mode (MODE) bit in the CTRL Register is one, the WDT is in window mode. Note
that the CTRL.MODE bit can only be changed when the WDT is disabled (CTRL.EN=0).
Figure 10-3 on page
T
T
p s e l
p se l
163.
psel
psel
.
a watchdog reset will be issued at the end of T
T im eo u t
T im e o u t
AT32UC3C
163
psel
,