ATxmega64A3U Atmel Corporation, ATxmega64A3U Datasheet - Page 410

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ATxmega64A3U

Manufacturer Part Number
ATxmega64A3U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64A3U

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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32. Program and Debug Interface
32.1
32.2
8331A–AVR–07/11
Features
Overview
The Program and Debug Interface (PDI) is an Atmel proprietary interface for external program-
ming and on-chip debugging of a device.
The PDI supports fast programming of nonvolatile memory (NVM) spaces; flash, EEPOM, fuses,
lock bits, and the user signature row. This is done by accessing the NVM controller and execut-
ing NVM controller commands, as described in
Debug is supported through an on-chip debug system that offers nonintrusive, real-time debug.
It does not require any software or hardware resources except for the device pin connection.
Using the Atmel tool chain, it offers complete program flow control and support for an unlimited
number of program and complex data breakpoints. Application debug can be done from a C or
other high-level language source code level, as well as from an assembler and disassembler
level.
Programming and debugging can be done through two physical interfaces. The primary one is
the PDI physical layer, which is available on all devices. This is a two-pin interface that uses the
Reset pin for the clock input (PDI_CLK) and one other dedicated pin for data input and output
(PDI_DATA). A JTAG interface is also available on most devices, and this can be used for pro-
gramming and debugging through the four-pin JTAG interface. The JTAG interface is IEEE Std.
Programming
Debugging
Program and Debug Interface (PDI)
JTAG interface
– External programming through PDI or JTAG interfaces
– Boot loader support for programming through any communication interface
– Nonintrusive, real-time, on-chip debug system
– No software or hardware resources required from device except pin connection
– Program flow control
– Unlimited number of user program breakpoints
– Unlimited number of user data breakpoints, break on:
– No limitation on device clock frequency
– Two-pin interface for external programming and debugging
– Uses the Reset pin and a dedicated pin
– No I/O pins required during programming or debugging
– Four-pin, IEEE Std. 1149.1 compliant interface for programming and debugging
– Boundary scan capabilities according to IEEE Std. 1149.1 (JTAG)
Minimal protocol overhead for fast operation
Built-in error detection and handling for reliable operation
Go, Stop, Reset, Step Into, Step Over, Step Out, Run-to-Cursor
Data location read, write, or both read and write
Data location content equal or not equal to a value
Data location content is greater or smaller than a value
Data location content is within or outside a range
”Memory Programming” on page
Atmel AVR XMEGA AU
427.
410

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