ATxmega64A3U Atmel Corporation, ATxmega64A3U Datasheet - Page 174

• Manufacturer Part Number: ATxmega64A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega64A3U

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.8.1
14.8.2
14.8.3
8331A–AVR–07/11
Waveform Generation
Frequency (FRQ) Waveform Generation
Single-slope PWM Generation
synchronization prevents the occurrence of odd-length, non-symmetrical pulses for glitch-free
output.
The compare channels can be used for waveform generation on the corresponding port pins. To
make the waveform visible on the connected port pin, the following requirements must be
fulfilled:
Inverted waveform output is achieved by setting the invert output bit for the port pin.
For frequency generation the period time (T) is controlled by the CCA register instead of PER.
The waveform generation (WG) output is toggled on each compare match between the CNT and
CCA registers, as shown in
Figure 14-14. Frequency waveform generation.
The waveform frequency (f
where N represents the prescaler divider used. The waveform generated will have a maximum
frequency of half of the peripheral clock frequency (fclk
and no prescaling is used. This also applies when using the hi-res extension, since this
increases the resolution and not the frequency.
For single-slope PWM generation, the period (T) is controlled by PER, while CCx registers con-
trol the duty cycle of the WG output.
f
FRQ
1. A waveform generation mode must be selected.
2. Event actions must be disabled.
3. The CC channels used must be enabled. This will override the corresponding port pin
4. The direction for the associated port pin must be set to output.
CNT
WG Output
output register.
=
---------------------------------- -
2N CCA
BOTTOM
fclk
(
MAX
TOP
PER
+
1
)
FRQ
Figure 14-14 on page
Period (T)
) is defined by the following equation:
Figure 14-15
Direction Change
shows how the counter counts from BOTTOM
174.
Atmel AVR XMEGA AU
PER
) when CCA is set to zero (0x0000)
CNT written
"update"
174