ATtiny43U Atmel Corporation, ATtiny43U Datasheet - Page 90

• Manufacturer Part Number: ATtiny43U
• Manufacturer: Atmel Corporation

Specifications of ATtiny43U

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 0.7 to 5.5
• Operating Voltage (vcc): 0.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

12.9
12.9.1
12.9.2
90
Register Description
ATtiny43U
TCCR0A – Timer/Counter Control Register A
TCCR1A – Timer/Counter Control Register A
Figure 12-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
• Bits 7:6 – COMnA[1:0]: Compare Match Output A Mode
These bits control the Output Compare pin (OCnA) behavior. If one or both of the COMnA[1:0]
bits are set, the OCnA output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OCnA pin
must be set in order to enable the output driver.
When OCnA is connected to the pin, the function of the COMnA[1:0] bits depends on the
WGMn[2:0] bit setting.
WGMn[2:0] bits are set to a normal or CTC mode (non-PWM).
Table 12-2.
TCNTn
(clk
(CTC)
OCRnx
Bit
0x30 (0x50)
Read/Write
Initial Value
Bit
0x2F (0x4F)
Read/Write
Initial Value
OCFnx
clk
clk
COMnA1
I/O
I/O
Tn
/8)
0
0
1
1
caler (f
Compare Output Mode, non-PWM Mode
COM0A1
COM1A1
R/W
R/W
COMnA0
7
0
7
0
0
1
0
1
clk_I/O
TOP - 1
Table 12-2 on page 90
COM0A0
COM1A0
R/W
R/W
/8)
6
0
6
0
Description
Normal port operation, OCnA disconnected.
Toggle OCnA on Compare Match
Clear OCnA on Compare Match
Set OCnA on Compare Match
COM0B1
COM1B1
R/W
R/W
5
0
5
0
COM0B0
COM1B0
TOP
R/W
R/W
4
0
4
0
shows the COMnA[1:0] bit functionality when the
TOP
R
R
3
0
3
0
–
–
BOTTOM
R
R
2
0
2
0
–
–
WGM01
WGM11
R/W
R/W
1
0
1
0
WGM00
WGM10
R/W
R/W
BOTTOM + 1
0
0
0
0
8048B–AVR–03/09
TCCR0A
TCCR1A