ATtiny43U Atmel Corporation, ATtiny43U Datasheet - Page 79

• Manufacturer Part Number: ATtiny43U
• Manufacturer: Atmel Corporation

Specifications of ATtiny43U

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 0.7 to 5.5
• Operating Voltage (vcc): 0.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

12. 8-bit Timer/Counter with PWM (Timer/Counter0 and Timer/Counter1)
12.1
12.2
8048B–AVR–03/09
Features
Overview
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•
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•
•
•
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Timer/Counter0 and Timer/Conter1 are general purpose Timer/Counter modules with two inde-
pendent Output Compare Units, each, and with PWM support. They allow accurate program
execution timing (event management) and wave generation.
Register and bit references in this section are written in general form. A lower case “n” replaces
the Timer/Counter number, and a lower case “x” replaces the Output Compare Unit, in this case
Compare Unit A or Compare Unit B. However, when using the register or bit defines in a pro-
gram, the precise form must be used, i.e., TCNT0 for accessing Timer/Counter0 counter value
and so on.
A simplified block diagram of the 8-bit Timer/Counter is shown in
the actual placement of I/O pins, refer to
including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit loca-
tions are listed in the
Figure 12-1. 8-bit Timer/Counter Block Diagram
Two Independent Output Compare Units
Double Buffered Output Compare Registers
Clear Timer on Compare Match (Auto Reload)
Glitch Free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
Six Independent Interrupt Sources (TOV0, OCF0A, OCF0B, TOV1, OCF1A, and OCF1B)
“Register Description” on page
Timer/Counter
TCCRnA
OCRnA
TCNTn
OCRnB
=
=
Direction
Count
Clear
Control Logic
Figure 1-1 on page
TOP
=
TCCRnB
Value
BOTTOM
Fixed
TOP
clk
=
90.
Tn
0
2. CPU accessible I/O Registers,
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
Waveform
Waveform
( From Prescaler )
Detector
Edge
Figure 12-1 on page
OCnA
OCnB
Tn
79. For
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