ATmega64M1 Atmel Corporation, ATmega64M1 Datasheet - Page 98

• Manufacturer Part Number: ATmega64M1
• Manufacturer: Atmel Corporation

Specifications of ATmega64M1

• Flash (kbytes): 64 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 27
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Can: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 14
• Input Capture Channels: 1
• Pwm Channels: 10
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

98
ATmega16M1/32M1/64M1
Table 14-7
rect PWM mode.
Table 14-7.
Note:
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
Table 14-8.
Notes:
Mode
COM0B1
0
1
2
3
4
5
6
7
0
0
1
1
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
1. MAX
2. BOTTOM = 0x00
WGM02
pare Match is ignored, but the set or clear is done at TOP. See
page 93
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
0
0
0
0
1
1
1
1
Compare Output Mode, Phase Correct PWM Mode
Waveform Generation Mode Bit Description
COM0B0
for more details
= 0xFF
0
1
0
1
WGM01
0
0
1
1
0
0
1
1
Description
Normal port operation, OC0B disconnected
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting
Table
WGM00
0
1
0
1
0
1
0
1
14-8. Modes of operation supported by the Timer/Counter
Timer/Counter
Mode of
Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
“Modes of Operation” on page
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
–
–
(1)
“Phase Correct PWM Mode” on
Update of
Immediate
Immediate
OCRx at
TOP
TOP
TOP
TOP
–
–
90).
8209D–AVR–11/10
Set on
TOV Flag
BOTTOM
BOTTOM
MAX
MAX
MAX
TOP
–
–
(1)(2)