ATmega64M1 Atmel Corporation, ATmega64M1 Datasheet - Page 195
ATmega64M1
Manufacturer Part Number
ATmega64M1
Description
Manufacturer
Atmel Corporation
Specifications of ATmega64M1
Flash (kbytes)
64 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATmega64M1-15MD
Manufacturer:
ATMEL
Quantity:
700
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19.11.5
19.11.6
19.12 Examples of CAN Baud Rate Setting
8209D–AVR–11/10
CANSTML and CANSTMH – CAN Time Stamp Registers
CANMSG – CAN Data Message Register
• Bit 2 – RTRMSK: Remote Transmission Request Mask
• Bit 1 – Reserved Bit
Writing zero in this bit is recommended.
• Bit 0 – IDEMSK: Identifier Extension Mask
• Bits 15:0 - TIMSTM[15:0]: Time Stamp Count
CAN time stamp counter range 0 to 65,535.
• Bit 7:0 – MSG[7:0]: Message Data
This register contains the CAN data byte pointed at the page MOb register.
After writing in the page MOb register, this byte is equal to the specified message location of the
pre-defined identifier + index. If auto-incrementation is used, at the end of the data register writ-
ing or reading cycle, the index is auto-incremented.
The range of the counting is 8 with no end of loop (0, 1,..., 7, 0,...).
The CAN bus requires very accurate timing especially for high baud rates. It is recommended to
use only an external crystal for CAN operations.
(Refer to
186
Initial Value
Read/Write
Initial Value
Read/Write
to
Bit
Bit
– 0 - comparison true forced
– 1 - bit comparison enabled
– 0 - comparison true forced
– 1 - bit comparison enabled
Bit
page 188
“Bit Timing” on page 170
TIMSTM15 TIMSTM14 TIMSTM13 TIMSTM12 TIMSTM11 TIMSTM10
TIMSTM7
MSG 7
15
R/W
R
7
-
for “CAN Bit Timing Registers”).
7
-
TIMSTM6
MSG 6
14
R/W
6
R
-
6
-
TIMSTM5
MSG 5
R/W
13
R
and
5
-
5
-
“Baud Rate” on page 172
TIMSTM4
MSG 4
R/W
12
R
4
-
4
-
ATmega16M1/32M1/64M1
TIMSTM3
MSG 3
R/W
11
R
3
-
3
-
TIMSTM2
MSG 2
R/W
10
R
2
-
2
-
for timing description and
TIMSTM1
TIMSTM9
MSG 1
R/W
R
1
9
-
1
-
TIMSTM8
TIMSTM0
MSG 0
R/W
R
0
8
-
0
-
CANSTMH
CANSTML
CANMSG
page
195
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