ATmega64M1 Atmel Corporation, ATmega64M1 Datasheet - Page 256

• Manufacturer Part Number: ATmega64M1
• Manufacturer: Atmel Corporation

Specifications of ATmega64M1

• Flash (kbytes): 64 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 27
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Can: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 14
• Input Capture Channels: 1
• Pwm Channels: 10
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

23.3
23.4
23.4.1
256
Use of ADC Amplifiers
Register Description
ATmega16M1/32M1/64M1
AC0CON – Analog Comparator 0 Control Register
Thanks to AMPCMP0 configuration bit, Comparator 0 positive input can be connected to Ampli-
fier O output. In that case, the clock of comparator 0 is adapted to the amplifier 0 clock.
“AMP0CSR – Amplifier 0 Control and Status register” on page 247.
Thanks to AMPCMP1 configuration bit, Comparator 1 positive input can be connected to Ampli-
fier 1 output. In that case, the clock of comparator 1 is adapted to the amplifier 1 clock.
“AMP1CSR – Amplifier 1 Control and Status register” on page 248.
Thanks to AMPCMP2 configuration bit, Comparator 2 positive input can be connected to Ampli-
fier 2 output. In that case, the clock of comparator 2 is adapted to the amplifier 2 clock.
“AMP1CSR – Amplifier 1 Control and Status register” on page 248.
Each analog comparator has its own control register. A dedicated register has been designed to
consign the outputs and the flags of the 4 analog comparators.
Bit
Read/Write
Initial Value
• Bit 7 – AC0EN: Analog Comparator 0 Enable Bit
Set this bit to enable the analog comparator 0.
Clear this bit to disable the analog comparator 0.
• Bit 6 – AC0IE: Analog Comparator 0 Interrupt Enable bit
Set this bit to enable the analog comparator 0 interrupt.
Clear this bit to disable the analog comparator 0 interrupt.
• Bit 5:4 – AC0IS[1:0]: Analog Comparator 0 Interrupt Select bit
These 2 bits determine the sensitivity of the interrupt trigger.
The different setting are shown in
Table 23-1.
• Bit 3 – ACCKSEL: Analog Comparator Clock Select
Set this bit to use the PLL output as comparator clock.
Clear this bit to use the CLK
• Bit 2:0 – AC0M[2:0]: Analog Comparator 0 Multiplexer register
These 3 bits determine the input of the negative input of the analog comparator.
The different setting are shown in
AC0IS[1:0]
00
01
10
11
Interrupt sensitivity selection
AC0EN
R/W
7
0
AC0IE
R/W
6
0
IO
as comparator clock.
AC0IS1
Table
Table 23-2 on page
R/W
5
0
Comparator interrupt on output falling edge
Comparator interrupt on output rising edge
Comparator Interrupt on output toggle
23-1.
AC0IS0
R/W
4
0
Description
ACCKSEL
Reserved
R/W
3
0
257.
AC0M2
R/W
2
0
AC0M1
R/W
1
0
AC0M0
R/W
0
0
8209D–AVR–11/10
AC0CON
See
See
See