ATmega64M1 Atmel Corporation, ATmega64M1 Datasheet - Page 288
ATmega64M1
Manufacturer Part Number
ATmega64M1
Description
Manufacturer
Atmel Corporation
Specifications of ATmega64M1
Flash (kbytes)
64 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATmega64M1-15MD
Manufacturer:
ATMEL
Quantity:
700
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288
Fuse Bits
ATmega16M1/32M1/64M1
Table 27-3.
Notes:
The ATmega16M1/32M1/64M1 has three Fuse bytes.
describe briefly the functionality of all the fuses and how they are mapped into the Fuse bytes.
Note that the fuses are read as logical zero, “0”, if they are programmed.
Table 27-4.
Extended Fuse Byte
-
-
PSCRB
PSCRVA
PSCRVB
BLB0 Mode
BLB1 Mode
1
2
3
4
1
2
3
4
1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2
2. “1” means unprogrammed, “0” means programmed
Lock Bit Protection Modes
Extended Fuse Byte
BLB02
BLB12
1
1
0
0
1
1
0
0
BLB01
BLB11
Bit No
7
6
5
4
3
1
0
0
1
1
0
0
1
No restrictions for SPM or LPM accessing the Application
section
SPM is not allowed to write to the Application section
SPM is not allowed to write to the Application section, and LPM
executing from the Boot Loader section is not allowed to read
from the Application section. If Interrupt Vectors are placed in
the Boot Loader section, interrupts are disabled while executing
from the Application section
LPM executing from the Boot Loader section is not allowed to
read from the Application section. If Interrupt Vectors are placed
in the Boot Loader section, interrupts are disabled while
executing from the Application section
No restrictions for SPM or LPM accessing the Boot Loader
section
SPM is not allowed to write to the Boot Loader section
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read
from the Boot Loader section. If Interrupt Vectors are placed in
the Application section, interrupts are disabled while executing
from the Boot Loader section
LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section
Description
-
-
PSC Reset Behaviour
PSCOUTnA Reset Value
PSCOUTnB Reset Value
(1)(2)
Table 27-4
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
to
Table 27-7 on page 290
8209D–AVR–11/10
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