ATmega64M1 Atmel Corporation, ATmega64M1 Datasheet - Page 190

• Manufacturer Part Number: ATmega64M1
• Manufacturer: Atmel Corporation

Specifications of ATmega64M1

• Flash (kbytes): 64 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 27
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Can: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 14
• Input Capture Channels: 1
• Pwm Channels: 10
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

19.10.17 CANPAGE – CAN Page MOb Register
19.11 MOb Registers
19.11.1
190
ATmega16M1/32M1/64M1
CANSTMOB – CAN MOb Status Register
• Bit 3:0 – CGP[3:0]: CAN General Purpose Bits
These bits can be pre-programmed to match with the wanted configuration of the CANPAGE
register (that is, AINC and INDX2:0 setting).
• Bit 7:4 – MOBNB3:0: MOb Number
Selection of the MOb number, the available numbers are from 0 to 5.
Note:
• Bit 3 – AINC: Auto Increment of the FIFO CAN Data Buffer Index (Active Low)
• Bit 2:0 – INDX[2:0]: FIFO CAN Data Buffer Index
Byte location of the CAN data byte into the FIFO for the defined MOb.
The MOb registers has no initial (default) value after RESET.
• Bit 7 – DLCW: Data Length Code Warning
The incoming message does not have the DLC expected. Whatever the frame type, the DLC
field of the CANCDMOB register is updated by the received DLC.
• Bit 6 – TXOK: Transmit OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The communication enabled by transmission is completed. TxOK rises at the end of EOF field.
When the controller is ready to send a frame, if two or more message objects are enabled as
producers, the lower MOb index (0 to 14) is supplied first.
• Bit 5 – RXOK: Receive OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The communication enabled by reception is completed. RxOK rises at the end of the 6
EOF field. In case of two or more message object reception hits, the lower MOb index (0 to 14)
is updated first.
Read/Write
Initial Value
Read/Write
Initial Value
– 0 - auto increment of the index (default value)
– 1- no auto increment of the index
Bit
Bit
MOBNB3 always must be written to zero for compatibility with all AVR CAN devices
MOBNB3
DLCW
R/W
R/W
7
0
7
-
MOBNB2
TXOK
R/W
R/W
6
-
6
0
MOBNB1
RXOK
R/W
R/W
5
-
5
0
MOBNB0
BERR
R/W
R/W
4
-
4
0
SERR
R/W
AINC
R/W
3
-
3
0
CERR
R/W
INDX2
R/W
2
-
2
0
FERR
R/W
INDX1
R/W
1
-
1
0
AERR
R/W
INDX0
0
R/W
-
0
0
8209D–AVR–11/10
CANSTMOB
CANPAGE
th
bit of