ATmega64M1 Atmel Corporation, ATmega64M1 Datasheet - Page 217

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ATmega64M1

Manufacturer Part Number
ATmega64M1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega64M1

Flash (kbytes)
64 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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20.6.2
8209D–AVR–11/10
LINSIR – LIN Status and Interrupt Register
• Bit 3 - LENA: Enable
• Bit 2:0 - LCMD[2:0]: Command and mode
The command is only available if LENA is set, and is set according to
Table 20-7.
• Bits 7:5 - LIDST[2:0]: Identifier Status
The LIN Identifier status is set according to
Table 20-8.
• Bit 4 - LBUSY: Busy Signal
• Bit 3 - LERR: Error Interrupt
Bit
Read/Write
Initial Value
LCMD[2:0]
000
001
010
011
100
11x
1x1
LIDST[2:0]
0xx
100
101
110
111
enable bit - LENERR - is set in LINENIR.
– 0 = Disable (both LIN and UART modes)
– 1 = Enable (both LIN and UART modes)
– 0 = Not busy
– 1 = Busy (receiving or transmitting)
– 0 = No error
– 1 = An error has occurred
It is a logical OR of LINERR register bits. This bit generates an interrupt if its respective
LIDST2
LIN Commanads
LIN Identifier Status
Mode
LIN Rx Header - LIN abort
LIN Tx Header
LIN Rx Response
LIN Tx Response
UART Rx & Tx Byte disable
UART Rx Byte enable
UART Tx Byte enable
Status
No specific identifier
Identifier 60 (0x3C)
Identifier 61 (0x3D)
Identifier 62 (0x3E)
Identifier 63 (0x3F)
R
7
0
LIDST1
R
6
0
LIDST0
R
5
0
LBUSY
Table
R
4
0
ATmega16M1/32M1/64M1
20-8.
R/W
LERR
3
0
one
R/W
LIDOK
2
0
one
R/W
LTXOK
Table
1
0
one
20-7.
LRXOK
R/W
0
0
one
LINSIR
217

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