ATmega1280R212 Atmel Corporation, ATmega1280R212 Datasheet - Page 165

• Manufacturer Part Number: ATmega1280R212
• Manufacturer: Atmel Corporation

Specifications of ATmega1280R212

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 16 MHz
• Max I/o Pins: 86
• Spi: 5
• Twi (i2c): 1
• Uart: 4
• Adc Channels: 16
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 6
• Frequency Band: 700/800/900MHz
• Max Data Rate (mb/s): 1
• Antenna Diversity: No
• External Pa Control: Yes
• Power Output (dbm): 10
• Receiver Sensitivity (dbm): -110
• Receive Current Consumption (ma): 9.0
• Transmit Current Consumption (ma): 18 at 5dBm
• Link Budget (dbm): 120

17.11.27 OCR5BH and OCR5BL – Output Compare Register 5 B
17.11.28 OCR5CH and OCR5CL –Output Compare Register 5 C
17.11.29 ICR1H and ICR1L – Input Capture Register 1
17.11.30 ICR3H and ICR3L – Input Capture Register 3
17.11.31 ICR4H and ICR4L – Input Capture Register 4
17.11.32 ICR5H and ICR5L – Input Capture Register 5
2549N–AVR–05/11
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers.
Bit
(0x12B)
(0x12A)
Read/Write
Initial Value
Bit
(0x12D)
(0x12C)
Read/Write
Initial Value
Bit
(0x87)
(0x86)
Read/Write
Initial Value
Bit
(0x97)
(0x96)
Read/Write
Initial Value
Bit
(0xA7)
(0xA6)
Read/Write
Initial Value
Bit
(0x127)
(0x126)
Read/Write
Initial Value
See “Accessing 16-bit Registers” on page 138.
R/W
R/W
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
6
0
6
0
ATmega640/1280/1281/2560/2561
R/W
R/W
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
5
0
5
0
R/W
R/W
R/W
R/W
R/W
R/W
4
0
4
0
4
0
4
0
4
0
4
0
OCR5B[15:8]
OCR5C[15:8]
OCR5B[7:0]
OCR5C[7:0]
ICR1[15:8]
ICR3[15:8]
ICR4[15:8]
ICR5[15:8]
ICR1[7:0]
ICR3[7:0]
ICR4[7:0]
ICR5[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
3
0
3
0
R/W
R/W
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
1
0
1
0
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
OCR5BH
OCR5CH
OCR5BL
OCR5CL
ICR1H
ICR3H
ICR4H
ICR5H
ICR1L
ICR3L
ICR4L
ICR5L
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