ATmega1280R212 Atmel Corporation, ATmega1280R212 Datasheet - Page 130
ATmega1280R212
Manufacturer Part Number
ATmega1280R212
Description
Manufacturer
Atmel Corporation
Specifications of ATmega1280R212
Flash (kbytes)
128 Kbytes
Max. Operating Frequency
16 MHz
Max I/o Pins
86
Spi
5
Twi (i2c)
1
Uart
4
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
8
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
6
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120
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2549N–AVR–05/11
Table 16-4.
Note:
• Bits 5:4 – COM0B1:0: Compare Match Output B Mode
These bits control the Output Compare pin (OC0B) behavior. If one or both of the COM0B1:0
bits are set, the OC0B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0B pin
must be set in order to enable the output driver.
When OC0B is connected to the pin, the function of the COM0B1:0 bits depends on the
WGM02:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 16-5.
Table 16-6
mode.
Table 16-6.
Note:
COM0A1
COM0B1
COM0B1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
page 126
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 124
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to fast PWM
Compare Output Mode, Phase Correct PWM Mode
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
COM0A0
COM0B0
COM0B0
for more details.
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
Table 16-5
ATmega640/1280/1281/2560/2561
Clear OC0A on Compare Match when up-counting. Set OC0A on
Set OC0A on Compare Match when up-counting. Clear OC0A on
shows the COM0B1:0 bit functionality when the WGM02:0 bits
WGM02 = 0: Normal Port Operation, OC0A Disconnected
Clear OC0B on Compare Match, set OC0B at BOTTOM
Set OC0B on Compare Match, clear OC0B at BOTTOM
WGM02 = 1: Toggle OC0A on Compare Match
Normal port operation, OC0A disconnected
Normal port operation, OC0B disconnected
Normal port operation, OC0B disconnected
Compare Match when down-counting
Compare Match when down-counting
Toggle OC0B on Compare Match
Clear OC0B on Compare Match
Set OC0B on Compare Match
(non-inverting mode)
(inverting mode)
(1)
Description
Description
Description
Reserved
(1)
“Phase Correct PWM Mode” on
“Fast PWM Mode” on
130
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