ATmega1280R212 Atmel Corporation, ATmega1280R212 Datasheet - Page 93
ATmega1280R212
Manufacturer Part Number
ATmega1280R212
Description
Manufacturer
Atmel Corporation
Specifications of ATmega1280R212
Flash (kbytes)
128 Kbytes
Max. Operating Frequency
16 MHz
Max I/o Pins
86
Spi
5
Twi (i2c)
1
Uart
4
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
8
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
6
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120
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2549N–AVR–05/11
• OC4B – Port H, Bit 4
OC4B, Output Compare Match B output: The PH4 pin can serve as an external output for the
Timer/Counter2 Output Compare B. The pin has to be configured as an output (DDH4 set) to
serve this function. The OC4B pin is also the output pin for the PWM mode timer function.
• OC4A – Port H, Bit 3
OC4C, Output Compare Match A output: The PH3 pin can serve as an external output for the
Timer/Counter4 Output Compare A. The pin has to be configured as an output (DDH3 set) to
serve this function. The OC4A pin is also the output pin for the PWM mode timer function.
• XCK2 – Port H, Bit 2
XCK2, USART2 External Clock: The Data Direction Register (DDH2) controls whether the clock
is output (DDH2 set) or input (DDH2 cleared). The XC2K pin is active only when the USART2
operates in synchronous mode.
• TXD2 – Port H, Bit 1
TXD2, USART2 Transmit Pin.
• RXD2 – Port H, Bit 0
RXD2, USART2 Receive pin: Receive Data (Data input pin for the USART2). When the
USART2 Receiver is enabled, this pin is configured as an input regardless of the value of DDH0.
When the USART2 forces this pin to be an input, a logical on in PORTH0 will turn on the internal
pull-up.
Table 13-25. Overriding Signals for Alternate Functions in PH7:PH4
Signal Name
DIEOE
DIEOV
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
AIO
DI
T4 INPUT
PH7/T4
0
0
0
0
0
0
–
0
0
–
ATmega640/1280/1281/2560/2561
OC2B ENABLE
PH6/OC2B
OC2B
0
0
0
0
–
0
0
0
–
OC4C ENABLE
PH5/OC4C
OC4C
0
0
0
0
–
0
0
0
–
OC4B ENABLE
PH4/OC4B
OC4B
0
0
0
0
–
0
0
0
–
93
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