AT90PWM161 Atmel Corporation, AT90PWM161 Datasheet - Page 71

• Manufacturer Part Number: AT90PWM161
• Manufacturer: Atmel Corporation

Specifications of AT90PWM161

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

9.3
7734P–AVR–08/10
Alternate Port Functions
Most port pins have alternate functions in addition to being general digital I/Os.
port pin control signals from the simplified
riding signals may not be present in all port pins, but the figure serves as a generic description applicable
to all port pins in the AVR microcontroller family.
Figure 9-5.
Note:
Table 9-2
not shown in the succeeding tables. The overriding signals are generated internally in the modules having
the alternate function.
1. WRx, WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clk
Pxn
summarizes the function of the overriding signals. The pin and port indexes from
PUD are common to all ports. All other signals are unique for each pin.
Alternate Port Functions
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
DDOExn: Pxn DATA DIRECTION OVERRIDE ENABLE
PUOExn: Pxn PULL-UP OVERRIDE ENABLE
PUOVxn: Pxn PULL-UP OVERRIDE VALUE
DDOVxn: Pxn DATA DIRECTION OVERRIDE VALUE
PVOExn: Pxn PORT VALUE OVERRIDE ENABLE
PVOVxn: Pxn PORT VALUE OVERRIDE VALUE
PTOExn: Pxn, PORT TOGGLE OVERRIDE ENABLE
SLEEP: SLEEP CONTROL
1
0
1
0
1
0
1
0
(1)
Figure 9-2
PUOExn
PUOVxn
DIEOExn
DDOExn
DDOVxn
PVOExn
PVOVxn
DIEOVxn
SLEEP
can be overridden by alternate functions. The over-
SYNCHRONIZER
D
L
SET
CLR
Q
Q
AIOxn: ANALOG INPUT/OUTPUT PIN n ON PORTx
WDx: WRITE DDRx
WRx: WRITE PORTx
PUD: PULLUP DISABLE
WPx: WRITE PINx
clk
DIxn: DIGITAL INPUT PIN n ON PORTx
RDx: READ DDRx
RRx: READ PORTx REGISTER
RPx: READ PORTx PIN
D
PINxn
I/O
CLR
: I/O CLOCK
Q
Q
RESET
RESET
PORTxn
Q
Q
Q
Q
DDxn
CLR
CLR
D
D
AT90PWM81
Figure 9-5
1
0
clk
PUD
WDx
RRx
RDx
DIxn
AIOxn
RPx
I/O
WRx
shows how the
I/O
Figure 9-5
PTOExn
WPx
, SLEEP, and
are
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