AT90PWM161 Atmel Corporation, AT90PWM161 Datasheet - Page 113

• Manufacturer Part Number: AT90PWM161
• Manufacturer: Atmel Corporation

Specifications of AT90PWM161

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

12.7.2.2
12.8
7734P–AVR–08/10
PSCOUTn1
PSCOUTn0
Period
PSC Inputs
DT0
Enhanced Mode
OT0
The waveform frequency is defined by the following equation:
The Enhanced Mode uses the previously described method to generate a high resolution frequency.
12-13
Figure 12-13. Enhanced Mode, Timing Diagram
The supplementary step in counting to generate f
frame according to the fractional divider.
page
The waveform frequency is defined by the following equations:
d is the fractional divider factor.
The FWM can be applied on different locations within the PSC output waveforms as defined per
12-15 on page 137
Part A or B of PSC has its own system to take into account one PSC n internal input. Each part A or B is
configured by the PSC n Input A/B Control Register (PFRCnA/B
figuration Register ((see Section “PSC 2 Configuration Register – PCNF2”, page 135)
The PSC input module A is shown on
112.
gives an example of FWM with PBFMn1:0 = 00.
T1
DT1
f
PSCn
f2
OT1
f1
PSCn
=
PSCn
f
AVERAGE
----------------------------- -
PSCnCycle
=
=
-----
T
DT0
1
1
2
Table 12-14
-----
T
1
1
=
=
SeeTable 12-6, “Distribution of fb2 in the modulated frame,” on
=
------------------------------------------------------------------------------
(
----- -
16
OT0
d
-------------------------------------------------------------------- -
(
=
OT0
×
f1
-------------------------------------------------------------------- -
(
+
OT0
PSCn
b2
+
OT1
OT0
OT1
is added on the PSCn0 signal while needed in the
f
f
+
CLK_PSCn
CLK_PSCn
+
+
OT1
16 d
-------------- -
f
+
CLK_PSCn
DT0
16
–
DT0
+
T2
×
+
DT0
f2
page
+
DT1
DT1
PSCn
DT1
+
140) and the PSC n Extended Con-
+
DT1
)
1
)
)
OT1+1
AT90PWM81
DT0
Figure
Table
113