AT89C51CC03 Atmel Corporation, AT89C51CC03 Datasheet - Page 157

• Manufacturer Part Number: AT89C51CC03
• Manufacturer: Atmel Corporation

Specifications of AT89C51CC03

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 40 MHz
• Cpu: 8051-12C
• Max I/o Pins: 37
• Spi: 1
• Uart: 1
• Can: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 62.5
• Sram (kbytes): 2.25
• Eeprom (bytes): 2048
• Self Program Memory: API
• Operating Voltage (vcc): 3.0 to 5.5
• Timers: 4
• Isp: UART/CAN
• Watchdog: Yes

Registers
4182O–CAN–09/08
Table 103. ADCF Register
ADCF (S:F6h)
ADC Configuration
Reset Value =0000 0000b
Table 104. ADCON Register
ADCON (S:F3h)
ADC Control Register
Reset Value =X000 0000b
Number
Number
CH 7
Bit
Bit
7-0
2-0
7
7
-
7
6
5
4
3
Mnemonic Description
Mnemonic Description
PSIDLE
PSIDLE
ADEOC
SCH2:0
ADSST
CH 0:7
ADEN
CH 6
Bit
Bit
6
6
-
Channel Configuration
Set to use P1.x as ADC input.
Clear to use P1.x as standart I/O port.
Pseudo Idle Mode (Best Precision)
Set to put in idle mode during conversion
Clear to convert without idle mode.
Enable/Standby Mode
Set to enable ADC
Clear for Standby mode (power dissipation 1 uW).
End Of Conversion
Set by hardware when ADC result is ready to be read. This flag can generate an
interrupt.
Must be cleared by software.
Start and Status
Set to start an A/D conversion.
Cleared by hardware after completion of the conversion
Selection of Channel to Convert
see Table 102
ADEN
CH 5
5
5
ADEOC
CH 4
4
4
ADSST
CH 3
3
3
SCH2
CH 2
AT89C51CC03
2
2
SCH1
CH 1
1
1
SCH0
CH 0
0
0
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