AT89C51CC03 Atmel Corporation, AT89C51CC03 Datasheet - Page 20
AT89C51CC03
Manufacturer Part Number
AT89C51CC03
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C51CC03.pdf
(7 pages)
2.AT89C51CC03.pdf
(198 pages)
3.AT89C51CC03.pdf
(32 pages)
4.AT89C51CC03.pdf
(27 pages)
Specifications of AT89C51CC03
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
40 MHz
Cpu
8051-12C
Max I/o Pins
37
Spi
1
Uart
1
Can
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
2.25
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART/CAN
Watchdog
Yes
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Company
Part Number
Manufacturer
Quantity
Price
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AT
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17
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Part Number:
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Manufacturer:
TI
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18
Company:
Part Number:
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Manufacturer:
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Manufacturer:
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6 000
Company:
Part Number:
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Manufacturer:
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Quantity:
141
Registers
20
AT89C51CC03
Table 2. CKCON0 Register
CKCON0 (S:8Fh)
Clock Control Register
Note:
Reset Value = 0000 0000b
Number
CANX2
Bit
7
7
6
5
4
3
2
1
0
1. This control bit is validated when the CPU clock bit X2 is set; when X2 is low, this bit
has no effect.
Mnemonic Description
WDX2
CANX2
PCAX2
WDX2
T2X2
T1X2
T0X2
SIX2
Bit
X2
6
CAN clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
WatchDog clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Programmable Counter Array clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Enhanced UART clock (MODE 0 and 2)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer2 clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer1 clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer0 clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
CPU clock
Clear to select 12 clock periods per machine cycle (STD mode) for CPU and all
the peripherals.
Set to select 6 clock periods per machine cycle (X2 mode) and to enable the
individual peripherals "X2"bits.
PCAX2
5
(1)
(1)
(1)
(1)
SIX2
(1)
4
T2X2
3
(1)
(1)
T1X2
2
4182O–CAN–09/08
T0X2
1
X2
0