AT89C51CC03 Atmel Corporation, AT89C51CC03 Datasheet - Page 147

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AT89C51CC03

Manufacturer Part Number
AT89C51CC03
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51CC03

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
40 MHz
Cpu
8051-12C
Max I/o Pins
37
Spi
1
Uart
1
Can
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
2.25
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART/CAN
Watchdog
Yes

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PCA Registers
4182O–CAN–09/08
Table 95. CMOD Register
CMOD (S:D9h)
PCA Counter Mode Register
Reset Value = 00XX X000b
Number
CIDL
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
WDTE
WDTE
CPS1
CPS0
CIDL
ECF
Bit
6
-
-
-
PCA Counter Idle Control bit
Clear to let the PCA run during Idle mode.
Set to stop the PCA when Idle mode is invoked.
WatchDog Timer Enable
Clear to disable WatchDog Timer function on PCA Module 4,
Set to enable it.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
EWC Count Pulse Select bits
CPS1 CPS0 Clock source
0
0
1
1
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable PCA Counter Overflow Interrupt bit
Clear to disable CF bit in CCON register to generate an interrupt.
Set to enable CF bit in CCON register to generate an interrupt.
5
-
0
1
0
1
Internal Clock, FPca/6
Internal Clock, FPca/2
Timer 0 overflow
External clock at ECI/P1.2 pin (Max. Rate = FPca/4)
4
-
3
-
CPS1
AT89C51CC03
2
CPS0
1
ECF
0
147

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