DS3510T+T&R Maxim Integrated Products, DS3510T+T&R Datasheet - Page 9

IC I2C GAMMA/VCOM BUFF 48-TQFN

DS3510T+T&R

Manufacturer Part Number
DS3510T+T&R
Description
IC I2C GAMMA/VCOM BUFF 48-TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3510T+T&R

Applications
TFT-LCD Panels: Gamma Buffer, VCOM Driver
Output Type
Rail-to-Rail
Number Of Circuits
10
Current - Supply
6.7mA
Current - Output / Channel
4mA
Voltage - Supply, Single/dual (±)
9 V ~ 15 V
Mounting Type
Surface Mount
Package / Case
48-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
V
GND
SDA
SCL
V
V
CAP
I
LD
A0
S0
S1
DD
CC
2
C Gamma and V
V
V
COMPENSATION
DD
CC
_______________________________________________________________________________________
INTERFACE
CONTROL
LOGIC
AND
I
2
C
DS3510
I
MODE0 BIT (CR.0)
MODE1 BIT (CR.1)
S0/S1 PINS
S0/S1 BITS (SOFT S0/S1)
LD
COMP
2
C
COMP
COMP
COMP
COMP
COMP
I
I
I
I
I
2
2
2
2
2
C
C
C
C
C
S0/S1 PINS
S0/S1 PINS
VCOM BANK C
VCOM BANK D
S0/S1 PINS
S0/S1 PINS
S0/S1 PINS
GM10 BANK A
GM10 BANK B
GM10 BANK C
GM10 BANK D
S0/S1 BITS
S0/S1 BITS
VCOM BANK A
VCOM BANK B
S0/S1 BITS
S0/S1 BITS
S0/S1 BITS
GM6 BANK A
GM6 BANK B
GM6 BANK C
GM6 BANK D
GM5 BANK A
GM5 BANK B
GM5 BANK C
GM5 BANK D
GM1 BANK A
GM1 BANK B
GM1 BANK C
GM1 BANK D
BANKS
BANKS
BANKS
BANKS
BANKS
MODE0 BIT
MODE0 BIT
MODE0 BIT
MODE0 BIT
MODE0 BIT
0
1
0
1
0
1
0
1
0
1
MUX
MUX
MUX
MUX
MUX
COM
LATCH A
LATCH A
LATCH A
LATCH A
LATCH A
MODE1 BIT
MODE1 BIT
MODE1 BIT
MODE1 BIT
MODE1 BIT
Buffer with EEPROM
0
1
0
1
0
1
0
1
0
1
8 BITS
8 BITS
8 BITS
8 BITS
8 BITS
LATCH B
LATCH B
LATCH B
LATCH B
LATCH B
LD
LD
LD
LD
LD
GHM
GHM
GHH
GHH
GLM
GLM
GLL
GLL
8-BIT
8-BIT
8-BIT
8-BIT
8-BIT
DAC
DAC
DAC
DAC
DAC
Block Diagram
GHM
GHH
GLM
GLL
GHH
GM10
GM6
GHM
VRH
V
VRL
GLM
GM5
GM1
GLL
COM
9

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