SC28L201A1DGG,112 NXP Semiconductors, SC28L201A1DGG,112 Datasheet - Page 63
SC28L201A1DGG,112
Manufacturer Part Number
SC28L201A1DGG,112
Description
IC UART W/FIFO 48-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet
1.SC28L201A1DGG118.pdf
(110 pages)
Specifications of SC28L201A1DGG,112
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-3293-5
935277824112
SC28L201A1DGG
935277824112
SC28L201A1DGG
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Philips Semiconductors
9397 750 13138
Product data sheet
8.3.5 Watchdog, Character, Address and X Enable Register (WCXER)
This register enables the UARTs Character Recognition, Address Recognition and
Receiver watchdog timer. If both enable and disable are active, a disable results. This
register is used to enable the general-purpose character recognition feature without
causing any Xon/Xoff or Wake-up mode activities to occur. The recognition event is
reported in the ISR register.
Table 37:
[1]
Bit
7
6
5
4
3
2
1
0
[1]
This bit control is duplicated at MR0[7].
Symbol
WCXER - Watchdog, Character, Address and X Enable Register (address 0x40) bit
description
Description
Watchdog enable.
Watchdog disable.
Address recognition disable.
Address recognition enable.
Xon recognition disable.
Xon recognition enable.
Xoff recognition disable.
Xoff recognition enable.
Rev. 01 — 31 October 2005
1 = disable watchdog
0 = no action
1 = enable watchdog
0 = no action
1 = disable Address recognition
0 = no action
1 = enable Address recognition
0 = no action
1 = disable Xon
0 = no action
1 = enable Xon
0 = no action
1 = disable Xoff
0 = no action
1 = enable Xoff
0 = no action
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC28L201
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