SC28L201A1DGG,118 NXP Semiconductors, SC28L201A1DGG,118 Datasheet - Page 75

IC UART W/FIFO 48-TSSOP

SC28L201A1DGG,118

Manufacturer Part Number
SC28L201A1DGG,118
Description
IC UART W/FIFO 48-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet

Specifications of SC28L201A1DGG,118

Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935277824118
SC28L201A1DGG-T
SC28L201A1DGG-T
Philips Semiconductors
9397 750 13138
Product data sheet
8.6.2 Input Port Change Register Lower Nibble, B (IPCRL)
This register may be read to determine the current logical level of the I/O pins and
examine the output of the change detectors assigned to each pin. If the change detection
is not enabled or if the pin is configured as an output, the associated change field will read
‘0’.
Table 62:
Bit
7
6
5
4
3
2
1
0
Symbol
IPCRL - Input Port Change Register Lower Nibble, B (address 0x1C)
bit description
Description
reserved
I/O3B state. Reads the actual logic level at the pin.
I/O2B state. Reads the actual logic level at the pin.
reserved
I/O0B state. Reads the actual logic level at the pin.
Rev. 01 — 31 October 2005
I/O3B change.
I/O2B change.
I/O0B change.
0 = no change
1 = change
0 = no change
1 = change
0 = no change
1 = change
1 = HIGH level
0 = LOW level
1 = HIGH level
0 = LOW level
1 = HIGH level
0 = LOW level
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC28L201
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