SC28L201A1DGG,118 NXP Semiconductors, SC28L201A1DGG,118 Datasheet - Page 41

IC UART W/FIFO 48-TSSOP

SC28L201A1DGG,118

Manufacturer Part Number
SC28L201A1DGG,118
Description
IC UART W/FIFO 48-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet

Specifications of SC28L201A1DGG,118

Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935277824118
SC28L201A1DGG-T
SC28L201A1DGG-T
Philips Semiconductors
9397 750 13138
Product data sheet
8.1.6 Enhanced Operation Status register (EOS)
8.2 UART registers
This register reports the status of the Enhanced operation in several sub-systems in the
UART.
Table 11:
Remark: These registers are generally concerned with formatting, transmitting and
receiving data.
The user must exercise caution when changing the mode of running receivers,
transmitters, PBRG or counter/timers. The selected mode will be activated immediately
upon selection, even if this occurs during the reception or transmission of a character. It is
also possible to disrupt internal controllers by changing modes at critical times, thus
rendering later transmission or reception faulty or impossible.
An exception to this policy is switching from auto-echo or remote loopback modes to
normal mode. If the deselecting occurs just after the receiver has sampled the stop bit (in
most cases indicated by the assertion of the channels RxRDY bit) and the transmitter is
enabled, the transmitter will remain in auto-echo mode until the end of the transmission of
the stop bit.
Bit
7
6
5
4
3
2
1
0
Symbol
-
EOS - Enhanced Operation Status register (address 0x12) bit description
Rev. 01 — 31 October 2005
Description
reserved
I/O port operation
reserved
Counter/Timer 0 clock select
not used; returns ‘0’ on read
Rx/Tx clock selection
not used; returns ‘0’ on read
FIFO interrupt level control
0 = default
1 = enhanced
0 = default
1 = enhanced
0 = default
1 = enhanced
0 = default
1 = enhanced
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC28L201
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