DS3170N+ Maxim Integrated Products, DS3170N+ Datasheet - Page 72

IC TXRX DS3/E3 100-CSBGA

DS3170N+

Manufacturer Part Number
DS3170N+
Description
IC TXRX DS3/E3 100-CSBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3170N+

Function
Single-Chip Transceiver
Interface
DS3, E3
Number Of Circuits
1
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
120mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LBGA
Includes
DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Figure 10-9
paths available.
Figure 10-9. Loopback Modes
10.5.1.1 Analog Loopback (ALB)
Analog loopback is enabled by setting PORT.CR4.LBM[2:0] = 001. Analog loopback mode will not be enabled
when the port is configured for loop timed mode (set via the PORT.CR3.LOOPT bit).
The analog loopback is a loopback as close to the pins as possible. When both the Tx and RX LIU is enabled, it
loops back TXP and TXN to RXP and RXN, respectively. If the transmit signals on TXP and TXN are not
terminated properly, this loopback path may have data errors or loss of signal. When the LIU is not enabled, it
loops back TLCLK,TPOS / TDAT,TNEG to RLCLK, RPOS / RDAT , RNEG.
Figure 10-10. ALB Mux
Clock Rate
Receive
Transmit
DS3/E3
TXP
DS3/E3
TXN
Adapter
RXN
RXP
LIU
LIU
highlights where each loopback mode is located and gives an overall view of the various loopback
Decoder
Encoder
HDB3
B3ZS/
B3ZS/
HDB3
LIU
TX
LIU
RX
TUA1
TAIS
IEEE P1149.1
Access Port
JTAG Test
FEAC
DS3 / E3
DS3 / E3
Receive
Framer
Transmit
Formatter
Buffer
Trace
Trail
72 of 230
HDLC
GEN
UA1
DS3170 DS3/E3 Single-Chip Transceiver
RX BERT
TX BERT
Microprocessor
Interface

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