KMPC8548ECVTAUJC Freescale Semiconductor, KMPC8548ECVTAUJC Datasheet - Page 61

• Manufacturer Part Number: KMPC8548ECVTAUJC
• Manufacturer: Freescale Semiconductor

Specifications of KMPC8548ECVTAUJC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Using this waveform, the definitions are as follows. To simplify the illustration, the following definitions
assume that the SerDes transmitter and receiver operate in a fully symmetrical differential signaling
environment.
Freescale Semiconductor
1. Single-ended swing
2. Differential output voltage, V
3. Differential input voltage, V
4. Differential peak voltage, V
5. Differential peak-to-peak, V
6. Common mode voltage, V
the two complimentary output voltages: V
or negative.
The differential output voltage (or swing) of the transmitter, V
each have a peak-to-peak swing of A – B volts. This is also referred as each signal wire’s
single-ended swing.
complimentary input voltages: V
negative.
each range from A – B to –(A – B) volts, the peak-to-peak value of the differential transmitter
output signal or the differential receiver input signal is defined as differential peak-to-peak voltage,
V
twice of the differential peak. For example, the output differential peak-to-peak voltage can also be
calculated as V
of a balanced interchange circuit and ground. In this example, for SerDes output, V
+ V
within a differential pair. In a system, the common mode voltage may often differ from one
component’s output to the other’s input. Sometimes, it may be even different between the receiver
input and driver output circuits within the same component. It is also referred to as the DC offset.
The transmitter output signals and the receiver input signals SD_TX, SD_TX, SD_RX and SD_RX
The differential input voltage (or swing) of the receiver, V
The peak value of the differential transmitter output signal or the differential receiver input signal
Since the differential output signal of the transmitter and the differential input signal of the receiver
The common mode voltage is equal to one half of the sum of the voltages between each conductor
is defined as differential peak voltage, V
DIFFp-p
SD_TX
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 7
= 2 × V
= (A + B)/2, which is the arithmetic mean of the two complimentary output voltages
TX-DIFFp-p
DIFFp
= 2 × |(A – B)| volts, which is twice of differential swing in amplitude, or
= 2 × |V
cm
DIFFp
ID
DIFFp-p
OD
(or differential input swing):
SD_RX
(or differential output swing):
OD
|.
– V
DIFFp
SD_TX
SD_RX
= |A – B| volts.
– V
. The V
SD_TX
ID
ID
. The V
, is defined as the difference of the two
value can be either positive or
OD
, is defined as the difference of
OD
High-Speed Serial Interfaces (HSSI)
value can be either positive
cm_out
= V
SD_TX
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