DA82562EM Intel, DA82562EM Datasheet - Page 18

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DA82562EM

Manufacturer Part Number
DA82562EM
Description
Manufacturer
Intel
Datasheet

Specifications of DA82562EM

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Power Management Interface
3.4
10
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
Link Operation
In the D0 state, the device maintains an active link. The 82558 B-step (refer to
and Revision ID” on page
is enabled and the device has power. This implies:
During the D3 power state, the 82558 A-step does not maintain an active link. The 82558 B-step
and later generation devices do not maintain a link in D3 if PME is disabled or if the device does
not have power.
10BASE-T Mode: The device expects a normal clock input on the X1 and X2 pins. It expects
to receive normal reception on the Receive Differential Positive and Receive Differential
Negative signals (RDP/RDN pair). The device will not transmit on the Transmit Differential
Positive and Transmit Differential Negative signals (TDP/TDN pair).
100BASE-TX Mode: The device expects a normal clock input on the X1 and X2 pins and to
receive normal reception on the RDP/RDN pair. It transmits a continuous idle stream on the
TDP/TDN pair, as required by the 100BASE-TX standard. The 82558 does not transmit
frames on the link.
Auto-Negotiation: If the link fails while the device is in the D1 state, it performs the normal
auto-negotiation protocol in order to re-establish the link. For the 82558 B-step, if the link fails
in the D3 state and PME is enabled and the device has power, the device will attempt to use the
normal auto-negotiation protocol in order to re-establish the link. If the link fails on the 82559
in the D3 state and PME is enabled and the device has power, the 82559 will go into a deep
power down state, rather than trying to re-establish the link with the auto-negotiation protocol.
13) and later devices also maintain an active link in the D3 state if PME
Table 2, “Device

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