DA82562EM Intel, DA82562EM Datasheet - Page 127

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DA82562EM

Manufacturer Part Number
DA82562EM
Description
Manufacturer
Intel
Datasheet

Specifications of DA82562EM

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7.2.4
10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
Table 58. 24-bit OUI Identification Number
Table 59. MDI Identification Registers 2 and 3: PHY ID Encoding
The revision number is a 4-bit value assigned by the manufacturer identifying the PHY revision
number. The Intel devices use revision numbers “0000” through “0100.” The Intel 82558 has a
revision ID number of 0000b, and the 82559, 0100b.
The map below shows how the these three numbers (OUI, model and revision numbers) are
mapped into the MDI registers.
The PHY identification register values are as follows:
Auto-Negotiation Advertisement Register: Register 4
This register contains the advertisement ability of the PHY. It is used by software to determine the
highest common denominator technology after the auto-negotiation process has finished. Any
changes to this register prior to auto-negotiation must be followed by setting the Renegotiate bit in
the Command register.
Manufacturer
Intel
Intel 82555
MDI Register
Register 2
Register 3
Bit
15
14
13
12:11
10
9
8
7
Name
Next Page
Acknowledge
Remote Fault
Reserved
Pause
100BASE-T4
100BASE-TX Full
Duplex
100BASE-TX
a
00AA00h
00AA00h
Intel 82555
(Revision 4)
02A8h
0154h
OUI
a
a
00b
00b
23:22
Intel 82555
(Revision 1)
02A8h
0151h
R / W
R/W
RO
R/W
RO
RO
R/W
R/W
R/W
00 0000 1010 1010 00b
00 0000 1010 1010 00b
Description
Next page is not supported and this bit should be
set to 0b.
This bit position in the transmitted code word is
used to indicate an acknowledge. It is set only by
the auto-negotiation logic after receiving three
consecutive and matching code words from the link
partner.
This bit indicates remote fault in the local station. It
may be set by management to indicate the remote
fault condition of the partner.
These bits are reserved.
This bit indicates that Pause is supported by the
local node.
This field indicates that 100BASE-T4 is supported
by the local node.
This indicates that 100BASE-TX full duplex is
supported by the local node.
This bit indicates that 100BASE-TX is supported by
the local node.
Intel 82555
(Revision 0)
02A8h
0150h
21:6
OUI
00 0000b
00 0000b
5:0
Physical Layer Interface
010101b
Model
0000b
Revision
Default
0
0
0
000
82558: 0
82559: 1
0
1
1
119

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